Electro-Optical Device

ABSTRACT

An electro-optical device having a plurality of pixels including a plurality of EL elements, wherein the electro-optical device provides a gray scale display by controlling a period of time at which the plurality of the EL elements emit light in one frame period; the plurality of the EL elements have a first electrode and a second electrode; the first electrode is held at a constant potential; and a potential of the second electrode changes in such a manner that a polarity of an EL driving voltage, which is a difference between the potentials applied to the first and second electrodes, is inverted for each one frame period.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an EL (electro-luminescence) display(an electro-optical device) formed by preparing an EL element on asubstrate. More particularly, the invention relates to an EL displayusing a semiconductor element (an element using a semiconductor thinfilm). Furthermore, the present invention relates to an electronicdevice in which the EL display is used in a display portion thereof.

2. Description of the Related Art

In recent years, technology for forming a TFT on a substrate has beenlargely improved, and an application development of the TFT to an activematrix-type display device has been carried out. In particular, the TFTusing a polysilicon film has a higher electric field effect mobilitythan the TFT rising a conventional amorphous silicon film thereby theTFT may be moved at a high speed. Therefore, the pixel control which hasbeen conducted at a driver circuit outside of the substrate may beconducted at the driver circuit which is formed on the same substrate asthe pixel.

Such an active matrix-type display device can, by preparing variouscircuits and elements on the same substrate; obtain various advantagessuch as a decrease in the manufacturing cost, a decrease in the size ofthe display device, an increase in the yield ratio, and a decrease inthe throughput.

Further, research on the active matrix-type EL display having an ELelement as a self-light-emitting device is becoming more and moreactive. The EL display is referred to as an organic EL display (OLED) oran organic light-emitting diode (OLED).

The EL display is a self-light-emitting type diode unlike a liquidcrystal display device. The EL element is constituted in such a mannerthat an EL layer is sandwiched between a pair of electrodes. However,the EL layer normally has a lamination structure. Typically, thelamination structure of a “positive hole transport layer/a luminouslayer/an electron transport layer” proposed by Tang et al. of theEastman Kodak Company can be cited. This structure has a very highlight-emitting efficiency, and this structure is adopted in almost allthe EL displays which are currently subjected to research anddevelopment.

In addition, the structure may be such that on the pixel electrode, apositive hole injection layer/a positive hole transport layer/a luminouslayer/an electron transport layer, or a positive hole injection layer/apositive hole transport layer/a luminous layer/an electron transportlayer/an electron injection layer may be laminated in order.Phosphorescent dye or the like may be doped into the luminous layer.

In this specification, all the layers provided between the pair ofelectrodes are generally referred to as EL layers. Consequently, thepositive hole injection layer, the positive hole transport layer, theluminous layer, the electron transport layer, the electron injectionlayer or the like are all included in the EL layers.

Then, a predetermined voltage is applied to the EL layer having theabove structure from the pair of the electrodes, so that a recombinationof carriers is generated in the luminous layer and light is emitted.Incidentally, in this specification, the fact that the EL element isemitted is described as the fact that the EL element is driven.Furthermore, in this specification, the anode, the light-emittingelement formed of the EL layer and the cathode is referred to as an ELelement.

A problem in the practical application of the EL display is the shortlife of the EL element resulting from the deterioration of the EL layer.As factors which affect the length of the life of the EL layer, thestructure of a device which drives the EL display, the characteristic ofthe organic EL material which constitutes the EL layer, the material ofthe electrode, and the conditions in the manufacture process or the likecan be cited.

Then, in addition to the factors described above, what is recently notedas a factor which affects the length of life of the EL layer is a methodfor driving the EL display.

Conventionally, in order to emit light from the EL element, a method forapplying a direct current to two electrodes, an anode and a cathodesandwiching the EL element has been generally used. The conventionaldigital style time division gray scale display will be explained byreferring to FIG. 16. Here, the case of providing a 2^(n) gray scalefull color display with an n-bit digital drive system will be explained.

FIG. 15 shows a structure of the EL display pixel portion. A gate signallines (G1 through Gn) to which a gate signal is inputted are connectedto the gate electrode of the switching TFT 1501 incorporated in each ofthe pixels. Furthermore, one of the source region or the drain region ofthe switching TFT 1501 incorporated in each of the pixels is connectedto source signal lines (which are referred to also as data signal lines)(S1 through Sn), while the other is connected to a gate electrode of theEL driving TFT 1504 incorporated in each of the pixels and a capacitor1508 incorporated in each of the pixels, respectively.

One of the source region and the drain region of the EL driving TFT 1504incorporated in each of the pixels is connected to the power sourcesupply lines (V1 through Vn) while the other is connected to the ELelement 1506. The potential of the power source supply lines (V1 throughVn) is referred to as the potential of the power source. Note that, thepower source supply lines (V1 through Vn) is connected to a capacitor1508 incorporated in each of the pixels. Note that, the digital datasignal refers to a digital video signal.

The EL element 1506 comprises an anode and a cathode and an EL layerprovided between the anode and the cathode. In the case where the anodeis connected to the source region and the drain region of the EL drivingTFT 1504, namely, in the case where the anode is the pixel electrode,the cathode which is the opposite electrode is held at a constantpotential. On the contrary, in the case where the cathode is connectedto the source region or the drain region of the EL driving TFT 1504,that is, in the case the cathode is the pixel electrode, the anode,which is an opposite electrode is held at a constant potential.

Furthermore, in this specification, the potential of the oppositeelectrode is referred to as a stationary potential. Note that, the powersource for giving the stationary potential to the opposite electrode isreferred to as a stationary power source. It is desirable that thepotential of the anode is higher than the potential applied to thecathode. Therefore, the stationary potential changes in accordance withthe fact that the opposite electrode is the anode or the cathode. Forexample, in the case where the opposite electrode is the anode, it isdesirable that the stationary potential is set to be higher than thepower source potential. On the contrary, in the case where the oppositeelectrode is the cathode, it is desirable that the stationary potentialis set to be higher than the power source potential.

A difference in the potential between the stationary potential of theopposite electrode and the power source potential of the pixel electrodeis the EL driving voltage, and this EL driving voltage is applied to theEL layer.

FIG. 16 shows a timing chart in a digital style driving with a directcurrent in the conventional EL display. In the beginning, one frameperiod is divided into n sub-frame periods (SF1 through SFn). Note that,a period in which all the pixels in the pixel portion display one imageis referred to as one frame period (F). In a normal EL display, a frameperiod is provided in which the oscillation frequency is 60 Hz or more,that is, 60 or more frame period per one second is provided, so that 60or more images are displayed in one second. When the number of imagesdisplayed in one second becomes 60 or less, flickering of images such asa flicker or the like becomes visually conspicuous. Note that, theperiod into which one frame period is further divided into a pluralityof periods is referred to as a sub-frame period. With an increase in thenumber of gray scale levels, the division number of one frame periodalso increases, and the driver circuit must be driven at a highfrequency.

One sub-frame period is divided into an address period (Ta) and asustain period (Ts). The address period is time required for inputtingdata to all the pixels during one sub-frame period, while the sustainperiod (which is also referred to as a lighting period) is the period inwhich the EL element is lit.

The length of the address periods incorporated in each of the nsub-frame periods (SF1 through SFn) are the same. The sustain periods(Ts) incorporated in sub-frame periods SF1 through SFn respectively areset to Ts1 through Tsn, respectively.

The length of the sustain periods is set to be Ts1: Ts2: Ts3: . . . :Ts(n−1): Tsn=2⁰: 2⁻¹: 2⁻²: . . . : 2^(−(n-2)): 2^(−(n-1)). However, theorder in which the sustain periods SF1 through SFn are allowed to appearmay be any. With the combination of this sustain periods, a desired grayscale display can be provided out of 2^(n) gray scale levels.

In the beginning, in the address period, the power source supply lines(V1 through Vn) can be held at the same height with the stationarypotential. In this specification, the power source potential in thedigital driving address period is referred to as an off power sourcepotential. Note that, the height of the off power source potentialshould be on the same level with the stationary potential within thescope in which the EL element 1506 does not emit light. Note that, theEL driving voltage at this time is referred to as an off EL drivingvoltage. It is desired that the EL driving voltage at the OFF time is 0V, but the voltage may be on the order of not allowing the EL element1506 to emit light.

Then, the gate signal is inputted to the gate signal line G1, so thatthe switching TFTs 1501 having the gate electrode connected to the gatesignal line G1, are all turned on.

Then, in the state in which the switching TFTs 1501 having the gateelectrode connected to the gate signal line G1 is on, the digital datasignal is inputted to the source signal lines (S1 through Sn) in order.The digital data signal have information of “0” or “1”, and the digitaldata signal of “0” and “1” refers to a signal which has either Hivoltage or Lo voltage. Then, the digital data signal inputted to thesource signal lines (S1 through Sn) is inputted to the gate electrode ofthe EL driving TFTs 1504 via the switching TFTs 1501 in the ON state.Furthermore, the digital data signal is inputted to the capacitor 1508to be held.

Next, the gate signal is inputted to the gate signal line G2, and allthe switching TFTs 1501 having the gate electrode connected to the gatesignal line G2 are turned on. Then, in the state in which the switchingTFT 1501 having the gate electrode connected to the gate signal line G2is turned on, the digital data signal is inputted to the source signallines (S1 through Sn) in order. The digital signal inputted to thesource signal lines (S1 through Sn) is inputted to the gate electrode ofthe EL driving TFTs 1504 via the switching TFT 1501. Furthermore, thedigital data signal is also inputted to the capacitor 1508 to be held.

The above operation is repeated, and the digital data signal is inputtedto all the pixels. The period in which the digital data signal isinputted to all the pixels is an address period.

When the address period is completed, simultaneously the sustain periodbegins. When the sustain period begins, the potential of the powersource supply lines (V1 through Vn) changes from the OFF power sourcepotential to the ON power source potential. In this specification, inthe case of the digital driving, the power source potential in thesustain period is referred to as the on power source potential. Thedifference in potential of the on power source potential and thestationary potential should be such that the EL element emits light.Note that this potential difference is referred to as on EL drivingpotential. The off power source potential and the on power sourcepotential are generally referred to as the power source potential.Furthermore, the on EL driving voltage and off EL driving voltage aregenerally referred to as EL driving voltage.

In the sustain period, the switching TFTs 1501 are turned off. Then, thedigital data signal held in the capacitor 1508 is inputted to the gateelectrode of the EL driving TFTs 1504.

In the case where the digital data has information of “0”, the ELdriving TFT 1504 is turned off, so that the pixel electrode of the ELelement 1506 is held at the off power potential. As a consequence, theEL element 1506 incorporated in the pixel to which digital data signalhaving information of “0” is applied, does not emit light.

On the other hand, in the case where the digital data has information of“1”, the EL driving TFT 1504 is turned on, so that the pixel electrodeof the EL element 1506 becomes the on power source potential. As aconsequence, the EL element 1506 incorporated in the pixel to whichdigital data signal having information of “1” is applied, emits light.

The period in which all the switching TFTs 1501 are turned off is thesustain period.

The EL element emits light in any of the periods Ts1 through Tsn. In theperiod of Tsn, a predetermined EL element is allowed to emit light (apredetermined pixel is lit).

Next, the address period appears again. After the digital data signal isinputted to all the pixels, the sustain period appears. At this time,any of the sustain periods Ts1 through Tsn(n−1) appears. Here, Ts(n−1)appears, and a predetermined pixel is allowed to be lit in the Ts(n−1)period.

Thereafter, the similar operation in the remaining n−2 sub-frames isrepeated, and the sustain periods Ts(n−2), Ts(n−3) . . . Ts1 appear oneafter another, and the predetermined pixel is allowed to be lit in thesub-frame.

When n sub-frame periods appear, one frame period is completed. At thistime, the gray scale level of the pixel can be determined by summing upthe sustain period in which the pixel is lit in one frame period, namelythe length of the sustain period immediately after the address period inwhich the digital data signal having the information of “1” is appliedto the pixel.

For example, in case of n=8, when the luminance of the pixel which emitslight in all the sustain periods is set to 100%, the luminance of 75%can be represented in the case where the pixel emits light in Ts1 andTs2. In the case where Ts3, Ts5 and Ts8 are selected, the luminance of16% can be represented.

In this manner, the conventional EL display is driven with directcurrent, and the EL driving voltage applied to the EL layer always hasthe same polarity.

However, as has been introduced in “TSUTSUI. T, Jpn. J. Appl. Phys. Part2 VOL. 37, NO. 11B, p. L1406-L1408, 1998”, it has been found that thedeterioration of the current-voltage characteristic of the EL elementhas been improved by applying the EL driving voltage having the oppositepolarity to the EL element for each period.

However, no concrete proposal has been made with respect to a method fordriving an EL display which utilizes the fact that the deterioration ofthe current-voltage characteristic of the EL element is improved byapplying an EL driving voltage having the opposite polarity to the ELelement for each period, and with respect to the EL display using thedriving method.

Then, in order to prolong the life of the EL element, a proposal on themethod for driving the EL display for providing a display (hereinafterreferred to as an alternate current driving in this specification) byapplying the EL driving voltage having the opposite polarity to the ELelement for each of the definite period, and manufacture of the ELdisplay using the driving method has been expected. In particular,manufacture of an active matrix-type EL display for providing a displaywith the alternate current drive has been expected.

SUMMARY OF THE INVENTION

The present invention holds a first electrode incorporated in the ELelement at a constant potential (stationary potential) and holds thesecond polarity at a potential (a power source potential) of the powersource supply line in the driving of the EL display. Then, for each ofthe definite periods, the stationary voltage is fixed and the height ofthe power source potential is changed so that the polarity of the ELdriving voltage, which is a difference between the stationary potentialand the power source potential becomes opposite. For example, whenstationary potential is set to V_(T), the power source potential is setto V_(D), and the EL driving voltage is set to V_(T)−V_(D)=ΔV in acertain period, the stationary potential is set to V_(T), the powersource potential is set to V_(D)′, and EL driving voltage is set toV_(T)−V_(D)′=−ΔV

In the case of the time division gray scale display by the digital styledriver circuit, the polarity of the EL driving voltage may be changed tothe opposite for each frame period while the polarity of the EL drivingvoltage may be changed to the opposite for each sub-frame period.

In the case of the analog style driver circuit, the EL driving voltageis changed to the opposite polarity for each frame period.

Note that, because the EL element is a diode in the case where the ELelement emits light by the application of the EL driving voltage havinga certain polarity, the EL element does not emit light by theapplication of the EL driving voltage having the opposite polarity.

With such a structure, the EL driving voltage having the oppositepolarity is applied to the EL element for each definite period.Consequently, the deterioration of the current-voltage characteristic ofthe EL element is improved, so that the life of the EL element may beprolonged as compared with the conventional driving method.

Furthermore, as has been described above, flickering is generated as aflicker to the eyes of observers in the case where the image isdisplayed for each one frame period.

As a consequence, it is preferable in the present invention that the ELdisplay is driven with the alternate current at a frequency which is twotimes larger than the frequency at which no flickering is generated tothe eyes of observers in the direct current driving. In other words, itis preferable that 120 or more frame periods are provided in one second,and 60 or more images are displayed. In the above structure, flickeringby the alternate current is prevented.

Furthermore, the alternate current driving of the present invention maybe applied not only to the active matrix-type EL display device but alsoto a passive-type EL display device.

A structure of the present invention will be shown hereinbelow.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels including a plurality of ELelements,

characterized in that:

the electro-optical device provides a gray scale display by controllinga period of time at which the plurality of the EL elements emit light inone frame period,

the plurality of the EL elements have a first electrode and a second ELelement,

the first electrode is held at a constant potential, and

a potential of a second electrode changes in such a manner that apolarity of an EL driving voltage, which is a difference between thepotentials applied to the first and second electrodes, is inverted foreach one frame period.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels including a plurality of EL elements

characterized in that:

the electro-optical device provides a gray scale display by controllinga sum of lengths of sub-frame periods in which the plurality of the ELelements emit light out of the plurality of the sub-frame periodsincluded in one frame period,

the plurality of the EL elements have a first electrode and a secondelectrode,

the first electrode is held at a constant potential, and

a potential of a second electrode changes in such a manner that apolarity of an EL driving voltage, which is a difference between thepotentials applied to the first and second electrodes, is inverted foreach one sub-frame period.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels, the device including a plurality ofEL elements, a plurality of EL driving TFTs for controlling lightemission of the plurality of the EL elements, a plurality of switchingTFTs for controlling driving of the plurality of the EL driving TFTs,

characterized in that:

the electro-optical device provides a gray scale display by controllinga period of time at which the plurality of the EL elements emit light inone frame period,

the plurality of the EL elements have a first electrode and a second ELelement,

the first electrode is held at a constant potential, and

a potential of a second electrode changes in such a manner that apolarity of an EL driving voltage, which is a difference between thepotentials applied to the first and second electrodes, is inverted foreach one frame period.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels, the device including a plurality ofEL elements, a plurality of EL driving TFTs for controlling lightemission of the plurality of the EL elements, a plurality of switchingTFTs for controlling the driving of the plurality of the EL drivingTFTs;

characterized in that:

the electro-optical device provides a gray scale display by controllinga sum of lengths of sub-frame periods in which the plurality of the ELelements emit light out of the plurality of the sub-frame periodsincluded in one frame period,

the plurality of the EL elements have a first electrode and a secondelectrode;

the first electrode is held at a constant potential, and

a potential of a second electrode changes in such a manner that apolarity of an EL driving voltage, which is a difference between thepotentials applied to the first and second electrodes, is inverted foreach frame period.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels including a plurality of ELelements,

characterized in that:

the electro-optical device provides a gray scale display by controllinga period of time at which the plurality of the EL elements emit light inone frame period,

the plurality of the EL elements have a first electrode and a second ELelement,

the first electrode is held at a constant potential,

a potential of a second electrode changes in such a manner that apolarity of an EL driving voltage, which is a difference between thepotentials applied to the first and second electrodes, is inverted foreach one frame period, and

adjacent pixels out of the plurality of the pixels share a power sourcesupply line for supplying a voltage applied to the second electrode.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels including a plurality of ELelements,

characterized in that:

the electro-optical device provides a gray scale display by controllinga sum of lengths of sub-frame periods in which the plurality of the ELelements emit light out of the plurality of the sub-frame periodsincluded in one frame period,

the plurality of the EL elements have a first electrode and a secondelectrode,

the first electrode is held at a constant potential,

a potential of a second electrode changes in such a manner that apolarity of an EL driving voltage, which is a difference between thepotentials applied to the first and second electrodes, is inverted foreach frame period, and

adjacent pixels out of the plurality of the pixels share a power sourcesupply line for supplying a voltage applied to the second electrode.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels, the device including a plurality ofEL elements, a plurality of EL driving TFTs for controlling lightemission of the plurality of the EL elements, a plurality of switchingTFTs for controlling driving of the plurality of the EL driving TFTs;

characterized in that:

the electro-optical device provides a gray scale display by controllinga period of time at which the plurality of the EL elements emit light inone frame period,

the plurality of the EL elements have a first electrode and a second ELelement,

the first electrode is held at a constant potential,

a potential of a second electrode changes in such a manner that apolarity of an EL driving voltage, which is a difference between thepotentials applied to the first and second electrodes, is inverted foreach one frame period, and

a power source supply line for supplying a voltage applied to the secondelectrode is shared among adjacent pixels out of the plurality of thepixels.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels, the device including a plurality ofEL elements, a plurality of EL driving TFTs for controlling lightemission of the plurality of the EL elements, a plurality of switchingTFTs for controlling driving of the plurality of the EL driving TFTs;

characterized in that:

the electro-optical device provides a gray scale display by controllinga sum of lengths of sub-frame periods in which the plurality of the ELelements emit light out of the plurality of the sub-frame periodsincluded in one frame period,

the plurality of the EL elements have a first electrode and a secondelectrode,

the first electrode is held at a constant potential;

a potential of a second electrode changes in such a manner that apolarity of an EL driving voltage, which is a difference between thepotentials applied to the first and second electrodes, is inverted foreach sub-frame period, and

the adjacent pixels out of the plurality of the pixels share a powersource supply line for supplying a voltage applied to the secondelectrode.

The EL driving TFTs and the switching TFTs comprise an n-type channelTFT or a p-type channel TFT.

The light-emission of the plurality of the EL elements may be controlledwith a digital data signal inputted to the switching TFTs.

One frame period may be 1/120 s or less.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels, the device comprising:

a plurality of EL elements;

a plurality of EL driving TFTs for controlling the light emission of theplurality of EL elements; and

a plurality of switching TFTs for controlling driving of the pluralityof EL driving TFTs; characterized in that:

the electro-optical device provides a gray scale display by inputting ananalog video signal to a source region of the switching TFT,

the plurality of EL elements have a first electrode and a secondelectrode,

the first electrode is held at a constant potential, and

the second electrode is held at a voltage having an opposite polarity byreferencing a voltage applied to the first electrode for each one frameperiod.

According to the present invention, there is provided an electro-opticaldevice having a plurality of pixels, the device comprising:

a plurality of EL elements;

a plurality of EL driving TFTs for controlling light emission of theplurality of EL elements; and

a plurality of switching TFTs for controlling the driving of theplurality of EL driving TFTs; characterized in that:

the electro-optical device provides a gray scale display by inputting ananalog video signal to a source region of the switching TFT,

the plurality of EL elements have a first electrode and a secondelectrode,

the first electrode is held at a constant potential,

the second electrode is held at a voltage having an opposite polarity byreferencing a voltage applied to the first electrode for each one frameperiod, and

the adjacent pixels out of the plurality of the pixels share a powersource supply line for supplying a voltage applied to the secondelectrode.

The EL driving TFT and the switching TFT comprise an n-type channel TFTor a p-type channel TFT.

The one frame period may be 1/120 s or less.

The EL layer which the plurality of EL elements have may include a lowmolecular organic material or a polymer organic material.

The low molecular organic material may include Alq₃(tris-8-quinonolite-aluminum) or TPD (triphenylamine derivative)

The polymer organic material may include PPV (polyphenyleine vynyleine),PVK (polyvinyl-caracole) or polycarbonate.

There is provided a computer characterized in that the electro-opticaldevice is used.

There is provided a video camera characterized in that theelectro-optical device is used.

There is provided a DVD player characterized in that the electro-opticaldevice is used.

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings:

FIG. 1 is a view showing a structure of an EL display according to thepresent invention;

FIGS. 2A and 2B are circuit diagrams showing pixel portions according tothe present invention;

FIG. 3 is a timing chart showing a digital style driving with thealternate current according to the present invention;

FIG. 4 is a timing chart of an analog style driving with the alternatecurrent according to the present invention;

FIG. 5 is a timing chart of a digital style driving with the alternatecurrent according to the present invention;

FIGS. 6A and 6B are a circuit diagram and a top view of an EL displayaccording to the present invention;

FIG. 7 is a view showing a sectional structure of the EL displayaccording to the present invention;

FIGS. 8A to 8E are views showing a process of manufacturing the ELdisplay;

FIGS. 9A to 9D are views showing the process of manufacturing the ELdisplay;

FIGS. 10A to 10D are views showing the process of manufacturing the ELdisplay;

FIGS. 11A to 11C are views showing the process of manufacturing the ELdisplay;

FIG. 12 is a view showing an external appearance of an EL module;

FIGS. 13A and 13B are views showing the external appearances of the ELmodule;

FIGS. 14A and 14E are views showing concrete examples of an electricappliance;

FIG. 15 is a circuit diagram of the pixel portion of an EL display;

FIG. 16 is a conventional timing chart showing driving with thealternate current;

FIGS. 17A and 17B are circuit diagrams showing a pixel portion of the ELdisplay according to the present invention;

FIGS. 18A and 18B are circuit diagrams showing the pixel portion of theEL display according to the present invention;

FIGS. 19A and 19B are circuit diagrams showing the pixel portion of theEL display according to the present invention;

FIGS. 20A and 20B are circuit diagrams showing the pixel portion of theEL display according to the present invention; and

FIG. 21 is a view showing a sectional structure of the EL displayaccording to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

A structure of the present invention will be explained by using anexample of an EL display for providing a digital driving style timedivision gray-scale display. FIG. 1 shows an example of a circuitstructure according to the present invention.

The EL display of FIG. 1 has a pixel portion 101 formed of a TFT on asubstrate, a source signal side driver circuit 102 arranged in theperiphery of the pixel portion 101, and a gate signal side drivercircuit 103. Note that, in the embodiment, the EL display has the sourcesignal side driver circuit and the gate signal side driver circuit,respectively. However, in the present invention, the source signal sidedriver circuit may be two. Furthermore, the gate signal side drivercircuit may be two as well.

The source signal side driver circuit 102 basically includes a shiftregister 102 a, a latch (A) 102 b, and a latch (B) 102 c. Furthermore, aclock signal (CK) and a start pulse (SP) are inputted to the shiftregister 102 a. Digital data signals are inputted to the latch (A) 102b. Latch signals are inputted to the latch (B) 102 c.

Furthermore, though not shown, the gate signal side driver circuit 103has a shift register and a buffer. A multiplexer may be provided on theoutput side of the buffer.

The digital data signal inputted to the pixel portion 101 is formed atthe time division gray-scale data signal generating circuit 114. In thiscircuit, a video signal (signal including image information) comprisingan analog signal and a digital data signal is converted into a digitaldata signal for providing a time division gray-scale display, and at thesame time, is a circuit for generating a timing pulse or the likerequired for providing a time division gray-scale display.

Typically, the time division gray-scale data signal generating circuit114 includes means for dividing one frame period into a plurality ofsub-frame periods corresponding to a gray scale of n (n is an integer of2 or more) bits, means for selecting an address period and a sustainperiod in a plurality of the sub-frame periods, and means for settingthe length of the sustain periods to Ts1: Ts2: Ts3: . . . : Ts(n−1):Ts(n)=2⁰: 2⁻¹: 2⁻²: . . . : 2^(−(n-2)): 2^(−(n-1)).

At this time, the time division gray scale data signal generatingcircuit 114 may be provided on the outside portion of the EL displayaccording to the present invention. In such a case, the circuit isconstituted in such a manner that a digital data signal formed there isinputted to the EL display according to the present invention. In thiscase, an electronic device (an EL display device) having an EL displayaccording to the present invention as a display includes an EL displayof the present invention and a time division gray scale data signalgenerating circuit as a separate component.

Furthermore, the time division gray scale data signal generating circuit114 may be packaged on the EL display according to the present inventionin the form of an IC chip or the like. In such a case, the circuit maybe constituted in such a manner that the digital data signal formed onthe IC chip is inputted to the EL display according to the presentinvention. In this case, the electronic device having the EL display asa display in the present invention includes the EL display packaging theIC chip including the time division gray scale data signal generatingcircuit as a component.

Furthermore, finally, the time division gray scale data signalgenerating circuit 114 can be formed of TFTs on the same substrate withthe pixel portion 101, the source signal side driver circuit 102, andthe gate signal side driver circuit 103. In this case, when the videosignal including the image information is inputted to the EL display,the video signal can be processed all on the substrate. In this case,the time division gray scale data signal generating circuit may beformed of the TFTs in which a polysilicon film serves as an activelayer. Furthermore, in this case, the electronic device having the ELdisplay as a display is such that the time division gray scale datasignal generating circuit is incorporated in the EL display itselfthereby making it possible to attempt miniaturization of the electronicdevice.

On the pixel portion 101, a plurality of pixels 104 are arranged in amatrix-like configuration. FIG. 2A shows an enlarged view of the pixel104. In FIG. 2A, reference numeral 105 denotes a switching TFT. The gateelectrode of the switching TFT 105 is connected to the gate signal line106 for inputting the gate signal. The source region and the drainregion of the switching TFT 105 is constituted in such a manner that oneof the source region or the drain region is connected to the sourcesignal lines 107 for inputting the digital data signal while the otheris connected to a capacitor 113 which the gate electrode of the ELdriving TFT 108 and each of the pixels have respectively.

In addition, one of the source region and the drain region of the ELdriving TFTs 108 is connected to the power source supply line 111 whilethe other is connected to the EL element 110. The power source supplyline 111 is connected to the capacitor 113. When the switching TFT 105is in the non-selection mode (off-state), the capacitor 113 is providedto hold the gate voltage of the EL driving TFT 108.

The EL element 110 comprises an anode and a cathode and an EL layerprovided between the anode and the cathode. In the case where the anodeis connected to the source region or the drain region of the EL drivingTFTs 110, where the anode is a pixel electrode, the cathode is anopposite electrode. On the contrary, in the case where the cathode isconnected to the source region or the drain region of the EL drivingTFTs 110, namely in the case where the cathode is the pixel electrode,the anode is the opposite electrode.

The power source supply lines 111 are connected to the potential of thepower source. In this embodiment, the power source potential is alwaysheld at a constant potential.

Note that, a resistor may be provided between the source region or thedrain region of the EL driving TFTs 108 and the EL element 110. Byproviding the resistor, a current quantity supplied from the EL drivingTFT to the EL element is controlled thereby preventing the influence ofthe disparity of the EL driving TFT 108 characteristic. Since theresistor may be an element showing a sufficiently larger resistancevalue than the resistance value of the on resistance of the EL drivingTFTs, the structure or the like is not restricted in any way. Note that,the resistance of the on resistor is a value obtained by dividing thedrain voltage of the TFTs by the drain current flowing at that time whenthe TFTs are turned on. The resistance value of the resistor may beselected from the scope of 1 kΩ to 50 MΩ, (preferably, 10 kΩ to 10 MΩand more preferably the scope of 50 kΩ to 1 MΩ). Using a semiconductorlayer having a high resistance value as a resistor facilitates theformation of the resistor, so that the usage of such semiconductor layeris preferable.

Next, there will be explained the driving with the alternate current ofthe present invention by referring to FIG. 2B and FIG. 3. Here, therewill be explained a case in which 2^(n) gray scale full color timedivision gray scale display is provided by the n-bit digital drivingstyle.

FIG. 2B shows a structure of a pixel portion in an EL display accordingto the present invention. The gate signal lines (G1 through Gn) areconnected to the gate electrode of the switching TFT incorporated ineach of the pixels. One of the source region or the drain region of theswitching TFTs incorporated in each of the pixels is connected to thesource signal lines (S1 through Sn) while the other is connected to thegate electrode of the EL driving TFTs and the capacitor. Furthermore,one of the source region and the drain region of the EL driving TFTs isconnected to the power source supply lines (V1 through Vn) while theother is connected to the EL element incorporated in each of the pixels.The power source supply lines (V1 through Vn) are also connected to thecapacitor incorporated in each of the pixels.

FIG. 3 shows a timing chart in the EL display shown in FIG. 2A. In thebeginning, one frame period (F) is divided into n sub-frame periods (SF1through SFn). Note that, the period in which all the pixels in the pixelportion display one image is referred to as one frame period. In the ELdisplay according to the present invention, it is preferable that 120 ormore frame periods are provided in one second, so that 60 or more imagesare displayed in one second in the end.

When the number of images displayed in one second becomes 120 or less,flickering of images such as a flicker or the like becomes visuallyconspicuous.

Note that, a plurality of periods into which one frame period is furtherdivided are referred to as sub-frame periods. With an increase in thenumber of gray scale levels the divided number of one frame periodincreases, and the driver circuit must be driven at a high frequency.

One sub-frame period is divided into an address period (Ta) and asustain period (Ts). The address period refers to time required forinputting data to all the pixels while the sustain period (also referredto as lighting period) refers to a period in which a display isprovided.

The length of the address periods (Ta1 through Tan) incorporated in nsub-frame periods (SF1 through SFn) respectively are all the same. Thesustain period (Ts) incorporated in the sub-frame periods SF1 throughSFn respectively are set to Ts1 through Tsn respectively.

The length of the sustain period is set to be Ts1: Ts2: Ts3: . . . :Ts(n−1): Tsn=2⁰: 2⁻¹: 2⁻²: . . . : 2^(−(n-2)): 2^(−(n-1)). However, theorder in which SF1 through SFn are allowed to appear may be any. Withthe combination of these sustain periods, a desired gray scale displaycan be provided out of 2^(n) gray scale levels.

In the beginning, in the address period, the opposite electrode is heldat the stationary potential of the same height as the power sourcepotential. In this specification, the stationary potential in theaddress period of the digital driving is referred to as an offstationary potential. Note that, the height of the off stationarypotential may be the same as the height of the power source potentialwithin the scope in which the EL element does not emit light. Note that,the EL driving voltage at this time is referred to as the off EL drivingvoltage. Ideally, it is desired that the off EL driving voltage is 0 V,but the voltage may be on the level on which the EL element does notemit light.

Then, the gate signal is inputted to the gate signal line G1, and allthe switching TFTs having the gate electrode connected to the gatesignal line G1 are turned on.

In the state in which the switching TFTs having the gate electrodeconnected to the gate signal line G1 are turned on, the digital datasignals are inputted to all the source signal lines (S1 through Sn) atthe same time. The digital data signal has information of either “0” or“1”. The digital data signals of “0” and “1” refer to a signal having avoltage of either Hi or Lo. Then, the digital data signal inputted tothe source signal lines (S1 through Sn) is inputted to the gateelectrode of the EL driving TFT via the switching TFTs in the on state.Furthermore, the digital data signal is inputted to the capacitor aswell and is held.

Next, the gate signal is inputted to the gate signal line G2, and therearises a state in which all the switching TFTs having the gate electrodeconnected to the gate signal line G2 are turned on. Then in the state inwhich the switching TFTs having the gate electrode connected to the gatesignal lines G2 are turned on, the digital data signals are inputted toall the source signal lines (S1 through Sn) at the same time. Thedigital data signals inputted to the source signal lines (S1 through Sn)are inputted to the gate electrode of the EL driving TFT via theswitching TFT. Besides, the digital data signal is also inputted to thecapacitor and is held.

The above operation is repeated and the digital data signals areinputted to all the pixels. The period until the digital data signalsare inputted to all the pixels is an address period.

At the same time as when the address period is completed, the sustainperiod begins. When the sustain period begins, the potential of theopposite electrode changes from the off stationary potential to the onstationary potential. In this specification, the stationary potential inthe digital driving sustain period is referred to as an on stationarypotential. The on stationary potential may have a potential differencewith the power source potential to a degree to which the EL elementemits light. Note that, this potential difference is referred to as anon EL driving voltage.

Then, the switching TFTs are turned off, and the digital data signalheld in the capacitor is inputted to the gate electrode of the ELdriving TFTs.

In the form of embodiments, in the case where the digital data signalhas information of “0”; the EL driving TFTs are turned off, and thepixel electrode of the EL element is held at the off stationarypotential. As a consequence, the EL element incorporated in the pixel towhich the digital data signal having information of “0” is applied doesnot emit light.

On the contrary, in the case where the digital data signal hasinformation of “1”, the EL driving TFTs are turned on, so that a powersource potential is given to the pixel electrode of the EL element. As aconsequence, the EL element incorporated in the pixel to which thedigital data signal having information of “1” is applied emits light.

The period in which all the switching TFTs are in the off state is asustain period.

The period in which the EL element is allowed to emit light (the pixelis lit) is any of the periods Ts1 through Tsn. Here, suppose that apredetermined pixel is lit in a period of Tsn.

Next, the address period appears again, and the sustain period appearswhen the data signal is inputted to all the pixels. At this time, any ofthe sustain periods Ts1 through Ts(n−1) appears. Here, suppose that apredetermined pixel is allowed to be lit in the period of Ts(n−1).

Hereinbelow, suppose that a similar operation is repeated with respectto the remaining n−2 sub-frames, so that the sustain periods Ts(n−2),Ts(n−3) . . . Ts1 are set, and a predetermined pixel is lit inrespective sub-frames.

When n sub-frame periods appear, one frame period is completed. At thistime, the sustain period in which the pixel is lit in one frame period,namely the length of the sustain period immediately after the addressperiod in which the digital data signal having information of “1” isapplied to the pixel is summed, so that the gray scale level of thepixel is determined. For example, suppose that the luminance is set to100% in the case where the pixel emits light in all the sustain periodin case of n=8, the luminance of 75% can be represented in the casewhere the pixel emits light in Ts1 and Ts2. In the case where Ts3, Ts5and Ts8 are selected, the luminance of 16% can be represented.

When one frame period is completed, the height of the on stationarypotential is changed so that the polarity of the on EL driving voltagewhich is a difference in the power source voltage and the on stationaryvoltage becomes opposite to each other in the next frame period. Then,in the same manner as the previous frame period, the operation isconducted. However, the on EL driving voltage in the frame period has apolarity opposite to the on EL driving voltage in the previous frameperiod, so that the all the EL elements do not emit light. In thisspecification, the frame period in which the EL element displays theimage is referred to as the display frame period. Besides, on thecontrary, the frame period in which all the EL elements do not emitlight and the image is not displayed is referred to as the non-displayframe period.

When the non-display frame period is completed, another display frameperiod begins next. Then, the on EL driving voltage changes to a voltagehaving a polarity opposite to the on EL driving voltage in thenon-display frame period.

In this manner, the image is displayed by alternately repeating thedisplay frame period and the non-display frame period. The presentinvention has the above structure, so that the EL driving voltage havingthe opposite polarity is applied to the EL layer incorporated in the ELelement for each one definite period. Thus, the deterioration of thecurrent-voltage characteristic of the EL element is improved with theresult that the life of the EL element can be prolonged as compared withthe conventional driving method.

Furthermore, as described above, in the case where the image isdisplayed for each one frame period in the alternate current driving,flickering is generated as a flicker to the eyes of observers.

Therefore, according to the present invention, the EL display is drivenwith the alternate current at a frequency which is twice as large as thefrequency at which no flickering is generated to the eyes of observersin the driving with the direct current. In other words, 120 or moreframe periods are provided in one second. Then, as a consequence, 60 ormore images are displayed in one second. With this structure, flickeringresulting from the driving with the alternate current is prevented.

Note that, in the method for driving the EL display shown in thisembodiment, the power source potential is held at the constant level,and the opposite potential is changed in the address period and in thesustain period with the result that the size of the EL driving voltageis changed, and the light emission of the EL element is controlled.However, the present invention is not restricted to this structure. TheEL display of the present invention may be such that the oppositepotential is held on a constant level at all times, and the potential ofthe pixel electrode may be changed. In other words, contrary to the caseof the embodiments, the potential of the opposite electrode is held onthe same level at all times, and the power source potential is changedin the address period and in the sustain period thereby changing thesize of the EL driving voltage, so that the light emission of the ELelement may be controlled.

Furthermore, in this embodiment, since the potential of the oppositeelectrode and the power source potential are held at the same potentialin the address period, the EL element does not emit light. However, thepresent invention is not restricted to this structure. The display canbe provided in the address period in the same manner as in the displayperiod by providing at all times between the opposite electrode and thepower source potential the potential difference on a degree to which theEL element emits light. However, in this case, since the whole sub-frameperiods become a period in which the EL elements emit light, the lengthof the sub-frame periods is set to be SF1: SF2: SF3: . . . : SF(n−1):Sfn=2⁰: 2⁻¹: 2⁻²: . . . : 2^(−(n-2)): 2^(−(n-1)). With the abovestructure, as compared with the driving method which does not allowlight emission in the address period, an image with a high luminance canbe obtained.

Next, there will be explained a method for driving the EL display shownin FIGS. 1 to 2B according to the present invention with the alternatecurrent in an analog style. Note that, FIG. 4 will be referred to withrespect to the timing chart thereof.

A structure of a pixel portion of the EL display which is driven withthe alternate current in the analog style is the same as the EL displaywhich is driven with the alternate current in a digital style, and thegate signal lines (G1 through Gn) are connected to the gate electrode ofthe switching TFTs incorporated in each of the pixels. One of the sourceregion and the drain region of the switching TFTs incorporated in eachof the pixels is connected to the source signal lines (S1 through Sn)while the other is connected to the gate electrode of EL driving TFT andthe capacitor. One of the source region and the drain region of the ELdriving TFT is connected to the power source supply lines (V1 throughVn) while the other is connected to the EL element incorporated in eachof the pixels. The power source supply lines (V1 through Vn) are alsoconnected to the capacitor incorporated in each of the pixels.

FIG. 4 shows a timing chart in the case where the EL display is drivenwith the alternate current in the analog style. The period in which onegate signal line is selected is referred to as one line period.Furthermore, the period until the selection of all the gate signal linesis completed corresponds to one frame period. In the case of thisembodiment, n line periods are provided in one frame period because ngate signal lines are present.

Note that, with the EL display of the present invention, it ispreferable to provide 120 or more frame period in one second and it isdesired that 60 or more images are displayed in one second. When thenumber of images displayed in one second becomes 60 or less, flickeringof images such as a flicker becomes visually conspicuous.

With an increase in the number of gray scale levels, the number of lineperiods in one frame period also increases, and the driver circuit mustbe driven at a high frequency.

In the beginning, the power source voltage lines (V1 through Vn) areheld at off power source potential. Note that, in the case of the analogstyle driving with the alternate current, the height of the off powersource potential may be the same with as height of the stationarypotential within the scope in which the EL element does not emit light.Note that, the EL driving voltage at this time is referred to as off ELdriving voltage. Ideally, it is desired that the off EL driving voltageis 0 V, but the voltage may be to such a degree that the EL element 1506does not emit light.

In the first line period (L1), an analog video signal in inputted inorder to the source signal lines (S1 through Sn). The gate signal isinputted to the gate signal line G1 in the first line period (L1). As aconsequence, the analog video signal inputted to the source signal lineS1 is inputted to the gate electrode of the EL driving TFTs (1, 1) viathe switching TFTs (1, 1) because the switching TFTs is in the on state.

Then, the potential of the power source supply line V1 changes from theoff power source potential to the saturated power source potential. Notethat, in this specification, the saturated power source potential refersto a potential that has a potential difference with the stationarypotential to such a degree that the EL element emits light in the analogdriving.

The quantity of the current that flows in the EL driving TFT channelformation region is controlled depending on the size of the analog videosignal voltage input to the gate electrode. In the case of the analogdriving, the analog video signal is inputted to the gate electrode ofthe EL driving TFT. When one of the source region or the drain region isheld at the saturated power source potential, the other potential is setas the on power source potential. The EL driving voltage at this time isreferred to as on EL driving voltage.

Depending on the analog video signal applied to the gate electrode ofthe EL driving TFTs (1, 1), the on EL driving voltage the size of whichis controlled is applied to the EL element.

Next, the analog video signal is inputted to the source signal line S2in the same manner, and the switching TFTs are turned on. Consequently,the analog video signal input to the source signal line S2 is inputtedto the gate electrode of the EL driving TFTs (2, 1) via the switchingTFTs. (2, 1).

Thus, the EL driving TFTs (2, 1) are turned on. Then, the potential ofthe power source supply line V2 changes from the off power sourcepotential to the saturated power source potential. Consequently, the onEL driving voltage the size of which is controlled with the analog videosignal applied to the gate electrode of the EL driving TFTs (2, 1) isapplied to the EL element.

When the above operation is repeated, and the input of the analog videosignal to the source signal lines (S1 through Sn) is completed, thefirst line period (L1) is completed. Then, next the second line period(L2) begins, so that the gate signal is inputted to the gate signal lineG2. Then, in the same manner as the first line period (L1), the analogvideo signal is inputted to the source signal lines (S1 through Sn) inorder.

The analog video signal is inputted to the source signal line S1. Sincethe switching TFTs (1, 2) are turned on, the analog video signal inputto the source signal line S1 is inputted to the gate electrode of the ELdriving TFTs (1, 2) via the switching TFTs (1, 2).

Consequently, the EL driving TFT (1, 2) is turned on. Then, thepotential of the power source supply line V1 changes from the off powersource potential to the saturated power source potential. Thus, the ELdriving voltage the size of which is controlled with the analog videosignal applied to the gate electrode of the EL driving TFTs (1, 2) isapplied to the EL element.

When the above operation is repeated, and the input of the analog videosignal to the source signal lines (S1 through Sn) is completed, thesecond line period (L2) is completed. Then, next the third line period(L3) begins, and the gate signal is inputted to the gate signal line G3.Then, the gate signal is inputted to the gate signal lines (G1 throughGn) in order with the result that the one frame period is completed.

When this frame period is completed, the saturated power source voltagechanges in the next frame period with the result that the on powersource potential changes. Then, the on EL driving voltage changes to thevoltage having the opposite polarity. Then, in the same manner as theprevious frame period, the above operation is conducted. However, the onEL driving voltage in this frame period has a polarity opposite to thepolarity of the on EL driving voltage in the previous frame period.Consequently, the on EL driving voltage having the polarity opposite tothe polarity of the EL driving voltage in the previous frame period isapplied to all the EL elements with the result that the EL elements donot emit light. In this specification, the frame period in which the ELelements display the image is referred to as a display frame period,while on the contrary the frame period in which all the EL elements donot emit light and no image is displayed is referred to as non-displayframe period.

When the non-display frame period is completed, another display frameperiod begins at the next step. The EL driving voltage changes to avoltage having the polarity opposite to the polarity of the EL drivingvoltage in the non-display frame period.

In this manner, the image is displayed by alternately repeating thedisplay frame period and the non-display frame period. The presentinvention has the structure described above so that the on EL drivingvoltage having the opposite polarity is applied to the EL element ineach definite period. Consequently, the deterioration of thecurrent-voltage characteristic of the EL element is improved, and thelife of the EL element can be prolonged as compared with theconventional driving method.

Furthermore, in this embodiment, there is explained a case where thedisplay device is driven with the non-interlace scanning, but the deviceof the invention can also be driven with the interlace scanning.

EMBODIMENTS

Embodiments of the present invention will be explained hereinbelow.

Embodiment 1

In Embodiment 1, there will be explained a case in which the polarity ofthe on EL driving voltage is changed to the opposite polarity for eachsub-frame period in the case where the time division gray scale displayis provided in the digital-style driving with the alternate current.Here, there will be explained a case in which 2^(n) grays scalefull-color time division gray scale display is provided by the n-bitdigital device method.

The structure of the pixel portion of the EL display in Embodiment 1 isthe same as the structure shown in FIG. 2B. The gate signal lines (G1through Gn) are connected to the gate electrode of the switching TFTincorporated in each of the pixels. One of the source region and thedrain region of the switching TFTs incorporated in each of the pixels isconnected to the source signal lines (S1 through Sn) while the other isconnected to the gate electrode of the EL driving TFTs and thecapacitor. Furthermore, one of the source region and the drain region ofthe EL driving TFTs is connected to the power source supply lines (V1through Vn) while the other is connected to the EL element incorporatedin each of the pixels. The power source supply lines (V1 through Vn) arealso connected to the capacitor incorporated in each of the pixels.

FIG. 5 shows a timing chart of the driving method in Embodiment 1. Inthe beginning, one frame period is divided into n sub-frame periods (SF1through SFn). Note that, the period in which all the pixels in the pixelportion display one image is referred to as one frame period.

Note that, a plurality of periods into which one frame period is dividedare referred to as sub-frame periods. With an increase in the number ofgray scale levels, the number of the division of one frame periodincreases, so that the driver circuit must be driven at a highfrequency.

One sub-frame period is divided into address periods (Ta) and sustainperiods (Ts). The address period refers to time required for inputtingdata into all the pixels in one sub-frame period while the sub-frameperiod (also referred to as lighting period) refers to the period inwhich EL elements are allowed to emit light.

The lengths of the address periods (Ta1 through Tan) incorporated in nsub-frame periods respectively are all the same. The sustain periods(Ts) incorporated in n sub-frame periods SF1 through SFn are set to Ts1through Tsn respectively.

The lengths of the sustain periods is set to be Ts1: Ts2: Ts3: . . . :Ts(n−1): Tsn=2⁰: 2⁻¹: 2⁻²: . . . : 2^(−(n-2)): 2^(−(n-1)). However, theorder in which sub-frame periods SF1 through SFn are to allowed toappear may be any. With the combination of these sustain periods, adesired gray scale display can be provided out of 2^(n) gray scalelevels.

In the beginning, the opposite electrode is held at a stationarypotential. Then, the gate signal is inputted to the gate signal line G1.All the switching TFTs having the gate electrode connected to the gatesignal line G1 are turned on.

Then, in the state in which the switching TFTs having the gate electrodeconnected to the gate signal line G1 are turned on, the digital datasignals are inputted to all the source signal lines (S1 through Sn) atthe same time. Then, the digital data signals inputted to the sourcesignal lines (S1 through Sn) are inputted to the gate electrode of theEL driving TFTs via the switching TFTs in the on state. Further, thedigital data signal is also inputted to the capacitor and held.

The above operation is repeated, and the digital data signals areinputted to all the pixels. The period until the digital data signalsare inputted to all the pixels is the address period.

At the same time as when the address period is completed, the sustainperiod begins. When the sustain period begins, the potential of theopposite electrode changes from the off stationary potential to the onstationary potential. Then, the switching TFTs are turned off, thedigital signal held in the capacitor is inputted to the gate electrodeof the EL driving TFTs.

In Embodiment 1, the polarity of the on EL driving voltage which is adifference between the on stationary potential and the power sourcepotential becomes opposite to each other for each of the sub-frameperiods by changing the height of on the stationary potential.Consequently, the EL display repeats the display and the non-display bysetting the polarity of the on EL driving voltage for each of thesub-frame periods to the opposite. The sub-frame periods in which thedisplay is provided is referred to as the display sub-frame period whilethe sub-frame period in which no display is provided is referred to asthe non-display sub-frame period.

For example, in the first frame period, supposing that the firstsub-frame period is a display period, the second sub-frame period is anon-display period, and the third frame period becomes again the displayperiod. Then, when all the sub-frame period appears, and the first frameperiod is completed, the second frame period begins. In the firstsub-frame period in the second frame period; since the EL drivingvoltage having the polarity opposite to the EL driving voltage appliedto the EL element in the first sub-frame period in the first frameperiod is applied to the EL layer of the EL element, the non-displayperiod begins. Then, the next second sub-frame period becomes a displayperiod, and the display period and the non-display period alternatelyare provided for each of the sub-frame periods.

Note that, in this specification, when the display and the non-displayis changed over by the setting of the polarity of the EL driving voltageto the opposite, the period when the display is provided is referred toas a display period. In addition, the period when the display is notprovided on the contrary, is referred to as a non-display period.Consequently, in this specification, the display frame period and thedisplay sub-frame period are generally referred to as a display period.Furthermore, on the contrary, the non-display frame period and thenon-display sub-frame period are generally referred to as a non-displayperiod.

In the case where the digital data signal has information of “0” inEmbodiment 1, the EL driving TFTs are turned off, and the pixelelectrode of the EL element is held at the off stationary potential. Asa consequence, the EL element incorporated in the pixel to which thedigital data signal having information of “0” is applied does not emitlight.

On the contrary, in the case where the digital data signal hasinformation of “1”, the EL driving TFTs are turned on, so that the powersource potential is given to the pixel electrode of the EL element. As aconsequence, the EL element incorporated in the pixel to which thedigital signal having information of “1” is inputted emits light.

The period in which all the switching TFTs are turned off is the sustainperiod.

The period in which the EL element is allowed to emit light (the pixelis allowed to be lit) is any of the periods Ts1 through Tsn. Here,suppose that a predetermined pixel is allowed to light during the periodof Tsn.

Next, the address period begins again, and then the sustain periodbegins upon the input of the digital data signals to all the pixels. Atthis time, any of the periods Ts1 through Ts(n−1) becomes the sustainperiod. Here, suppose that the predetermined pixel is allowed to be litin a period of Ts(n−1).

A similar operation is repeated with respect to the remaining n−2sub-frame hereinbelow, so that the Ts(n−2), Ts(n−3) . . . Ts1 and thesustain period is set in order and a predetermined pixel is allowed tobe lit in respective sub-frames.

In this manner, in the case where the EL driving voltage having anopposite polarity with respect to each of the sub-frames is applied tothe EL element in the time division gray scale display at the time ofdriving with the alternate current, one gray scale display is providedin two frame periods. The gray scale level of the pixel can bedetermined by summing the length of the sustain period in which thepixel is lit in two adjacent frame periods, namely the length of thesustain period immediately after the address period in which the digitaldata signal having information of “1” is input to the pixel. Forexample, in case of n−8, when the luminance is set to 100% in the casewhere the pixel emits light in all the sustain periods, the luminance of75% can be represented in the case where the pixel emits light in Ts1and Ts2. In the case where Ts3, Ts5 and Ts8 are selected, the luminanceof about 16% can be represented.

The present invention has the above structure, so that the EL drivingvoltage having the opposite voltage is applied to the EL layerincorporated in the EL element in each of the sub-frame periods.Consequently, the deterioration of the current-voltage characteristic ofthe EL element can be improved, and the life of the EL element can beprolonged as compared with the conventional driving method.

In Embodiment 1, there is obtained an effect that flickering will occurwith difficulty as compared with the digital style EL display which isdriven with the alternate current for each of the frame periods shown inthe embodiment.

Embodiment 2

In Embodiment 2, an example is shown which is different from the pixelportion of to the EL display according to the present invention shown inFIG. 2A.

FIG. 6A shows a circuit diagram showing an example of an enlarged viewof the pixel portion of the EL display according to Embodiment 2. In thepixel portion, a plurality of pixels are arranged in a matrix-likeconfiguration. The pixel 603 and the pixel 604 are provided adjacent toeach other. In FIG. 6A, reference numerals 605 and 625 denote switchingTFTs. The gate electrode of the switching TFTs 605 and the 625 areconnected to the gate signal line 606 to which the gate signal isinputted. One of the source region and the drain region of switchingTFTs 605 and 625 is connected to the data signal lines (also referred toas source signal lines) 607 and 627 to which the digital data signal isinputted while the other is connected to the gate electrode of the ELdriving TFTs and the capacitors 613 and 633, respectively.

Then, the source region of the EL driving TFTs 608 and 628 is connectedto the common power source supply line 611, while the drain region isconnected to the pixel electrode incorporated in the EL elements 610 and630, respectively. In this manner, in Embodiment 2 two adjacent pixelsshare the power source supply line.

The EL elements 610 and 630 comprise an anode (a pixel electrode inEmbodiment 2), a cathode (an opposite electrode in Embodiment 2) and anEL layer provided between the anode and the cathode respectively. InEmbodiment 2, the drain region of the EL driving TFTs 608 and 628 isconnected to the anode while the cathode is connected to the stationarypower sources 612 and 622 and is held at the stationary potential. Thepresent invention is not limited to this structure. The drain region ofthe EL driving TFTs 608 and 628 may be connected to the cathode.

Note that, a resistor may be respectively provided between the drainregion of the EL driving TFTs 608 and 628, and the anode (pixelelectrode) incorporated in the EL elements 610 and 630, respectively. Byproviding the resistor, a current quantity supplied from the EL drivingTFTs to the EL element is controlled, so that the influence of disparityof the EL driving TFTs can be prevented. The resistor may be an elementwhich shows a sufficiently large resistance value than the on resistanceof the EL driving TFTs 608 and 628, so that there is no restriction onthe structure or the like. Note that, the on resistance is a valueobtained by dividing the drain voltage of the TFTs by the drain currentwhich flows at that time. As the resistance value of the resistor, thevalue may be selected from the scope of 1 kΩ through 50 MΩ (preferably,10 kΩ through 10 MΩ, and more preferably 50 kΩ through 1 MΩ). When asemiconductor layer having a high resistance value is used as theresistor, the formation is easy and preferable.

Furthermore, when the switching TFTs 605 and the 625 are set in thenon-selection state (off state), the capacitors 613 and 633 are providedfor holding the gate voltage of the EL driving TFTs 608 and 628. One oftwo electrodes incorporated in these capacitors 613 and 633 is connectedto the drain region of the switching TFTs 605 and 625 while the otherelectrode is connected to the power source supply line 611. Note that,the capacitors 613 and 633 may not necessarily be provided.

FIG. 6B shows a structural view of the circuit diagram shown in FIG. 6A.In a region surrounded by the source signal lines 607 and 627, the gatesignal lines 606 and 616, and the power source supply lines 611, pixels603 and 604 are provided. The source regions of the EL driving TFTs 608and 628 incorporated in the pixels 603 and 604 respectively are bothconnected to the power source supply line 611. In this embodiment, thetwo adjacent pixels share the power source supply line. As aconsequence, as compared with the structure shown in FIG. 2A, the ratioof the wiring in the whole pixel portion may be made small. When theratio of the wiring with respect to the whole pixel portion is small, awiring is provided in a direction in which the EL layer emits light,light shielding by the wiring can be suppressed.

The structure shown in Embodiment 2 may be made in a free combinationwith Embodiment 1.

Embodiment 3

Next, reference is made to FIG. 7 schematically showing the sectionalstructure of the EL display device of the present invention.

In FIG. 7, reference numeral 11 is a substrate, and 12 is an insulatingfilm that is a base (hereinafter, this film is designated as base film).For the substrate 11, use can be made of a light transmissiblesubstrate, representatively, a glass substrate, a quartz substrate, aglass ceramic substrate, or a crystallized glass substrate. However, itmust be resistible to the highest processing temperature in amanufacturing process.

The base film 12 is effective especially in using a substrate that has amovable ion or a substrate that has conductivity, but it is notnecessarily disposed on the quartz substrate. An insulating film thatcontains silicon can be used as the base film 12. It should be notedthat, in this specification, “insulating film that contains silicon”signifies an insulating film in which oxygen or nitrogen is added tosilicon at a predetermined ratio (SiOxNy: x and y are arbitraryintegers), such as a silicon oxide film, a silicon nitride film or asilicon nitride oxide film.

Reference numeral 201 is a switching TFT, and 202 is a EL driving TFT.The switching TFT is formed by an n-channel type TFT and the EL drivingTFT is formed by a p-channel type TFT. When the EL luminous direction istoward the under surface of a substrate (the under surface is notprovided TFT or EL layer), above mentioned structure is preferable.However, in the present invention, there is no need to limit thisstructure. The switching TFT and the EL driving TFT are possible to usethe p-channel type TFT or n-channel TFT for both of them or any onethereof.

The switching TFT 201 is made up of an active layer that includes asource region 13, a drain region 14, LDD (Lightly-Doped Drain) regions15 a-15 d, an isolation region 16, and channel formation regions 17 a,17 b, a gate insulating film 18, gate electrodes 19 a, 19 b, a firstinterlayer insulating film 20, a source signal line 21, and a drainwiring line 22. The gate insulating film 18 or the first interlayerinsulating film 20 can be common to all TFTs on the substrate, or can bevaried according to circuits or elements.

In the switching TFT 201 shown in FIG. 7, the gate electrodes 19 a, 19 bare connected electrically, in other words, a so-called double-gatestructure is established. Not only the double-gate structure but also aso-called multi-gate structure, such as a triple-gate structure, can beestablished, of course. The multi-gate structure signifies a structureincluding an active layer that has two channel formation regions or moreconnected in series.

The multi-gate structure is very effective to decrease an off current,and if the off current of the switching TFT is decreased sufficiently,the minimum capacity necessary for the capacitor can be reduced, whichis connected to the gate electrode of the driver TFT 202. That is, sincethe possession area of the capacitor can be reduced, the multi-gatestructure is also effective to widen the effective luminescence area ofthe EL element.

In the switching TFT 201, the LDD regions 15 a-15 d are disposed not tooverlap with the gate electrodes 19 a and 19 b, with the gate insulatingfilm 18 therebetween. The thus built structure is very effective todecrease the off current. The length (width) of the LDD regions 15 a-15d is 0.5-3.5 μm, representatively, 2.0-25 μm.

It is more desirable to form an offset region (i.e., region formed witha semiconductor layer whose composition is the same as the channelformation region, and in which a gate voltage is not applied) betweenthe channel formation region and the LDD region, in order to decreasethe off current. In the multi-gate structure that has two gateelectrodes or more, the isolation region 16 (i.e., region whoseconcentration is the same and to which the same impurity element isadded as the source region or the drain region) formed between thechannel formation regions is effective to decrease the off current.

The EL driving TFT 202 is made up of an active layer that includes asource region 26, a drain region 27, and a channel formation region 29,a gate insulating film 18, a gate electrode 30, the first interlayerinsulating film 20, a source signal line 31, and a drain wiring line 32.In this embodiment, EL driving TFT 202 is a p-channel type TFT.

The drain region 14 of the switching TFT 201 is connected to the gateelectrode 30 of the EL driving TFT 202. In more detail, the gateelectrode 30 of the EL driving TFT 202 is connected electrically to thedrain region 14 of the switching TFT 201 through the drain wiring line22 (also called connection wiring line), which is not shown. While thegate electrode 30 is a single gate structure in this embodiment,multi-gate structure is also applicable. The source signal line 31 ofthe EL driving TFT is connected to the current-supply line.

The EL driving TFT 202 is an element to control the amount of currentsupplied to the EL element, and a comparatively large amount of currentcan flow therethrough. Therefore, preferably, the channel-width (W) isdesigned to be greater than the channel-width of the switching TFT.Additionally, preferably, the channel-length (L) is designed to be longso that an excessive current does not flow through the EL driving TFT202. A desirable value is 0.5-2 mA (1-1.5 mA preferably) per pixel.

From the viewpoint of restraining the deterioration of TFT, it iseffective to thicken the film thickness of the active layer(specifically, the channel formation region) of the EL driving TFT 202(50-100 nm preferably, and 60-80 nm further preferably). On the otherhand, from the viewpoint of decreasing the off current in the switchingTFT 201, it is also effective to thin the film thickness of the activelayer (specifically, the channel formation region) (20-50 nm preferably,and 25-40 nm further preferably).

The structure of the TFT formed in the pixel was described above. Inthis formation, a driver circuit is also formed at the same time. A CMOScircuit that is a base unit to form the driver circuit is shown in FIG.7.

In FIG. 7, a TFT that has a structure to decrease the hot carrierinjection without reducing the operation speed to the utmost is used asthe n-channel type TFT 204 of the CMOS circuit. The driver circuitdescribed herein is the source signal side driver circuit and the gatesignal side driver circuit. It is also possible to form other logiccircuits (level shifter, A/D converter signal division circuit, etc.),of course.

The active layer of the n-channel type TFT 204 of the CMOS circuitincludes a source region 35, a drain region 36, an LDD region 37, and achannel formation region 38. The LDD region 37 overlaps with the gateelectrode 39, with the gate insulating film 18 therebetween.

The reason for forming the LDD region 37 only on the drain region 36side is not to reduce the operation speed. There is no need to worryabout the off current value in the n-channel type TFT 204. Instead, theoperation speed should be rated above it. Therefore, preferably, the LDDregion 37 is completely laid on the gate electrode, thus reducing aresistance component as much as possible. That is, a so-called offsetshould be omitted.

In the p-channel type TFT 205 of the CMOS circuit, there is no need toprovide the LDD region especially because the deterioration caused bythe hot carrier injection is quite negligible. Therefore, the activelayer includes a source region 40, a drain region 41, and a channelformation region 42. The gate insulating film 18 and the gate electrode43 are disposed thereon. It is also possible to dispose the LDD regionas well as the n-channel type TFT 204 in order to take countermeasuresagainst the hot carrier, of course.

The n-channel type TFT 204 and the p-channel type TFT 205 are coveredwith the first interlayer insulating film 20, and the source wiringlines 44, 45 are formed. The two are connected electrically by the drainwiring line 46.

Reference numeral 47 is a first passivation film. The film thicknessthereof is 10 nm-1 μm (200-500 nm preferably). An insulating filmincluding silicon (especially, a silicon nitride oxide film or a siliconnitride film is desirable) can be used as its material. The passivationfilm 47 serves to protect a formed TFT from alkali metal and water. TheEL layer finally disposed above the TFT includes alkali metal such assodium. In other words, the first passivation film 47 serves also as aprotective layer by which the alkali metal (movable ions) is not allowedto enter the TFT side.

Reference numeral 48 is a second interlayer insulating film, and servesas a flattening film to flatten level differences formed by the TFT.Preferably, an organic resin film, such as polyimide, polyamide, acrylicresin, or BCB (benzocyclobutene) is used as the second interlayerinsulating film 48. These organic resin films have an advantage in thata good smooth plane can be easily formed, and the dielectric constant islow. It is preferable to entirely absorb the level difference caused bythe TFT by means of the second interlayer insulating film 48 because theEL layer is very sensitive to ruggedness. Additionally, it is preferableto form a low-dielectric constant material thick, in order to decreasethe parasitic capacitance formed between the gate signal line or thedata signal line and the cathode of the to EL element. Therefore,preferably, the film thickness thereof is 0.5-5 μm (1.5-2.5 μmpreferably).

Reference numeral 49 is a pixel electrode (anode of the EL element) thatis made of a transparent conductive film. After a contact hole (opening)is made in the second interlayer insulating film 48 and the firstpassivation film 47, the electrode is connected to the drain wiring line32 of the EL driving TFT 202 through the opening. When the pixelelectrode 49 and the drain region 27 are arranged not to be connecteddirectly, as in FIGS. 2A and 2B, the alkali metal of the EL layer can beprevented from entering the active layer via the pixel electrode.

A third interlayer insulating film 50 whose thickness is 0.3-1 μm isdisposed on the pixel electrode 49. The film 50 is made of a siliconoxide film, a silicon nitride oxide film, or an organic resin film. Thethird interlayer insulating film 50 is provided with an opening on thepixel electrode 49 by etching, and the edge of the opening is etched tohave a taper shape. Preferably, the angle of the taper is 10-60° (30-50°preferably).

An EL layer 51 is formed on the third interlayer insulating film 50. TheEL layer 51 is used in the form of a single-layer structure or alaminate structure. The laminate structure is superior in luminousefficiency. Generally, a positive hole injection layer/a positive holetransporting layer/a luminescent layer/an electronic transporting layerare formed on the pixel electrode in this order. Instead, a structuremay be used which has the order of positive hole transportinglayer/luminescent layer/electronic transporting layer or the order ofpositive hole injection layer/positive hole transportinglayer/luminescent layer/electronic transporting layer/electronicinjection layer. In the present invention, any one of the knownstructures can be used, and fluorescent coloring matter, etc., can bedoped to the EL layer.

For example, materials indicated in the following U.S. patents orpublications can be used as the organic EL material; U.S. Pat. Nos.4,356,429: 4,539,507: 4,720,432: 4,769,292: 4,885,211: 4,950,950:5,059,861: 5,047,687: 5,073,446: 5,059,862: 5,061,617: 5,151,629:5,294,869: 5,294,870, and Japanese Laid-Open Patent Publication Nos.10-189525: 8-241048: 8-78159.

The EL display device mainly has four color display methods; method offorming three kinds of EL elements that correspond to R(red), G(green),and B(blue), respectively: method of combining an EL element of whiteluminescence and a color filter (coloring layer): method of combining anEL element of blue or blue-green luminescence and a fluorescent body(fluorescent color conversion layer: CCM): and method of stacking the ELelements that correspond to RGB while using a transparent electrode fora cathode (opposite electrode).

The structure of FIGS. 2A and 2B is an example in which the method offorming three kinds of EL elements that correspond to RGB is used. Onlyone pixel is shown in FIG. 7. In fact, pixels, each having the samestructure, are formed to correspond to each color of red, green, andblue, and thereby color display can be performed.

The present invention can be performed regardless of the luminescencemethod, and can use all the four methods. However, since the speed ofresponse of the fluorescent body is slower than that of the EL, and theproblem of afterglow occurs, the method in which the fluorescent body isnot used is preferable. Additionally, it can be said that a color filterthat causes the fall of luminescence brightness should not be used ifpossible.

A cathode 52 of the EL element is disposed on the EL layer 51. Amaterial that includes magnesium (Mg), lithium (Li) or calcium (Ca) thatis small in work function is used as the cathode 52. Preferably, use ismade of an electrode made of MgAg (material in which Mg and Ag are mixedin the ratio of Mg:Ag=10: 1). Instead, a MgAgAl electrode, a LiAlelectrode, or LiFAl electrode can be used.

EL element 206 is formed by pixel electrode (anode) 49, EL layer 51 andcathode 52.

It is necessary to form a layered body comprised of the EL layer 51 andthe cathode by each pixel individually. However, the EL layer 51 isquite weak to water, and a normal photolithography technique cannot beused. Therefore, it is preferable to use a physical mask material, suchas metal mask, and selectively form it according to a vapor phasemethod, such as a vacuum deposition method, a sputtering method, or aplasma CVD method.

It is also possible to use an ink jet method, a seen printing method, aspin coating method, and the like, as the method of selectively formingthe EL layer. However, these methods cannot continuously form thecathode in the current state of the art, and it can be said that themethod described above, not the ink jet method, etc., is desirable.

Reference numeral 53 is a protective electrode. This is to protect thecathode 52 from outside water, etc., and, at the same time, connect thecathode 52 of each pixel. For the protective electrode 53, it ispreferable to use a low-resistance material including aluminum (Al),copper (Cu), or silver (Ag). A cooling effect to lower the heat of theEL layer can be expected from the protective electrode 53.

Reference numeral 54 is a second passivation film, and, preferably, thefilm thickness thereof is 10 nm-1 μm (200-500 nm preferably). A mainpurpose to dispose the second passivation film 54 is to protect the ELlayer 51 from water. It is also effective to give it a cooling effect.However, the EL layer is weak to heat as mentioned above, and filmformation should be performed at a low temperature (ranging from a roomtemperature to 120° C. preferably). Therefore, it can be said that adesirable film formation method is the plasma CVD method, sputteringmethod, vacuum deposition method, ion plating method, or solutionapplication method (spin coating method).

Needless to say, all the TFTs shown in FIG. 7 have the polysilicon filmsused in the present invention as active layers.

The present invention is not limited to the structure of the EL displaydevice of FIG. 7. The structure of FIG. 7 is only one of the preferableform for operating the present invention.

The structure shown in this embodiment can be freely to combine andoperate with Embodiment 1 or Embodiment 2.

Embodiment 4

In this embodiment, reference is made to FIG. 21 schematically showingthe sectional structure of the EL display device of the presentinvention using another example than FIG. 7. An example of TFT can beused as the thin film transistor of bottom gate type TFT is explained inthis embodiment.

In FIG. 21, reference numeral 811 is a substrate, and 812 is aninsulating film that is a base (hereinafter, this film is designated asbase film). For the substrate 811, use can be made of a lighttransmissible substrate, representatively, a glass substrate, a quartzsubstrate, a glass ceramic substrate, or a crystallized glass substrate.However, it must be resistible to the highest processing temperature ina manufacturing process.

The base film 812 is effective especially in using a substrate that hasa movable ion or a substrate that has conductivity, but it is notnecessarily disposed on the quartz substrate. An insulating film thatcontains silicon can be used as the base film 812. It should be notedthat, in this specification, “insulating film that contains silicon”signifies an insulating film in which oxygen or nitrogen is added tosilicon at a predetermined ratio (SiOxNy: x and y are arbitraryintegers), such as a silicon oxide film, a silicon nitride film or asilicon nitride oxide film.

Reference numeral 8201 is a switching TFT, and 8202 is an EL drivingTFT. The switching TFT is formed by an n-channel type TFT and the ELdriving TFT is formed by a p-channel type TFT. When the EL luminousdirection is toward the under surface of a substrate (the under surfaceis not provided TFT or EL layer), above mentioned structure ispreferable. However, in the present invention, there is no need to limitthis structure. The switching TFT and the EL driving TFT are possible touse the p-channel type TFT or n-channel type TFT for both of them or anyone thereof.

The switching TFT 8201 is made up of an active layer that includes asource region 813, a drain region 814, LDD regions 815 a-815 d, anisolation region 816, and channel formation regions 863, 864, a gateinsulating film 818, gate electrodes 819 a, 819 b, a first interlayerinsulating film 820, a source signal line 821, and a drain wiring line822. The gate insulating film 818 or the first interlayer insulatingfilm 820 can be common to all TFTs on the substrate, or can be variedaccording to circuits or elements.

In the switching TFT 8201 shown in FIG. 21, the gate electrodes 819 a,819 b are connected electrically, in other words, a so-calleddouble-gate structure is established. Not only the double-gate structurebut also a so-called multi-gate structure, such as a triple-gatestructure, can be established, of course. The multi-gate structuresignifies a structure including an active layer that has two channelformation regions or more connected in series.

The multi-gate structure is very effective to decrease an off current,and if the off current of the switching TFT is decreased sufficiently,the capacity necessary for the capacitor can be reduced, which isconnected to the gate electrode of EL driving TFT 8202. That is, sincethe possession area of the capacitor can be reduced, the multi-gatestructure is also effective to widen the effective luminescence area ofthe EL element.

In the switching TFT 8201, the LDD regions 815 a-815 d are disposed notto overlap with the gate electrodes 819 a and 819 b, with the gateinsulating film 818 therebetween. The thus built structure is veryeffective to decrease the off current. The length (width) of the LDDregions 815 a-815 d is 0.5-3.5 μm, representatively, 2.0-2.5 μm.

It is more desirable to form an offset region (i.e., region formed witha semiconductor layer whose composition is the same as the channelformation region, and in which a gate voltage is not applied) betweenthe channel formation region and the LDD region, in order to decreasethe off current. In the multi-gate structure that has two gateelectrodes or more, the isolation region 816 (i.e., region whoseconcentration is the same and to which the same impurity element isadded as the source region or the drain region) formed between thechannel formation regions is effective to decrease the off current.

The current controlling TFT 8202 is made up of an active layer thatincludes a source region 826, a drain region 827, and a channelformation region 805, a gate insulating film 818, a gate electrode 830,the first interlayer insulating film 820, a source signal line 831, anda drain wiring line 832. In this embodiment, the EL driving TFT 8202 isa p-channel type TFT.

The drain region 814 of the switching TFT 8201 is connected to the gateelectrode 830 of the EL driving TFT 8202. In more detail, the gateelectrode 830 of the EL driving TFT 8202 is connected electrically tothe drain region 814 of the switching TFT 8201 through the drain wiringline 822 (also called connection wiring line). While the gate electrode830 is a single gate structure, the multi-gate structure is alsoapplicable. The source signal line 831 of the EL driving TFT 8202 isconnected to the current-supply line.

The EL driving TFT 8202 is an element to control the amount of currentsupplied to the EL element, and a comparatively large amount of currentcan flow therethrough. Therefore, preferably, the channel-width (W) isdesigned to be greater than the channel-width of the switching TFT.Additionally, preferably, the channel-length (L) is designed to be longso that an excessive current does not flow through the EL driving TFT202. A desirable value is 0.5-2 mA (1-1.5 mA preferably) per pixel.

From the viewpoint of restraining the deterioration of TFT, it is alsoeffective to thicken the film thickness of the active layer(specifically, the channel formation region) of the EL driving TFT 8202(50-100 nm preferably, and 60-80 nm further preferably). On the otherhand, from the viewpoint of decreasing the off current in the switchingTFT 8201, it is also effective to thin the film thickness of the activelayer (specifically, the channel formation region) (20-50 nm preferably,and 25-40 nm further preferably).

The structure of the TFT formed in the pixel was described above. Inthis formation, a driver circuit is also formed at the same time. A CMOScircuit that is a base unit to form the driver circuit is shown in FIG.21.

In FIG. 21, a TFT that has a structure to decrease the hot carrierinjection without reducing the operation speed to the utmost is used asthe n-channel type TFT 8204 of the CMOS circuit. The driver circuitdescribed herein is the source signal side driver circuit and the gatesignal side driver circuit. It is also possible to form other logiccircuits (level shifter, A/D converter, signal division circuit, etc.),of course.

The active layer of the n-channel type TFT 8204 includes a source region835, a drain region 836, an LDD region 837, and a channel formationregion 862. The LDD region 837 overlaps with the gate electrode 839,with the gate insulating film 818 therebetween.

The reason for forming the LDD region 837 only on the drain region side836 is not to reduce the operation speed. There is no need to worryabout the off current value in the n-channel type TFT 8204. Instead, theoperation speed should be rated above it. Therefore, preferably, the LDDregion 837 is completely laid on the gate electrode, thus reducing aresistance component as much as possible. That is, a so-called offsetshould be omitted.

In the p-channel type TFT 8205 of the CMOS circuit, there is no need toprovide the LDD region especially because the deterioration caused bythe hot carrier injection is quite negligible. Therefore, the activelayer includes a source region 840, a drain region 841, and a channelformation region 861. The gate insulating film 818 and the gateelectrode 843 are disposed thereon. It is also possible to dispose theLDD region as well as the n-channel type TFT 8204 in order to takecountermeasures against the hot carrier, of course.

It should be noted that the numeral 817 a, 817 b, 829, 838, and 842 aremask to form channel forming regions 861, 862, 863, 864, and 805.

The n-channel type TFT 8204 and the p-channel type TFT 8205,respectively, have the source signal line 844 and 845 with the firstinterlayer film 820 therebetween. The each drain region of the n-channeltype TFT 8204 and the p-channel type TFT 8205 are connected electricallyby the drain wiring line 846.

Reference numeral 847 is a first passivation film. The film thicknessthereof is 10 nm-1 μm (200-500 nm preferably). An insulating filmincluding silicon (especially, a silicon nitride oxide film or a siliconnitride film is desirable) can be used as its material. The passivationfilm 847 serves to protect a formed TFT from alkali metal and water. TheEL layer finally disposed above the TFT includes alkali metal such assodium. In other words, the first passivation film 847 serves also as aprotective layer by which the alkali metal (movable ions) is not allowedto enter the TFT side.

Reference numeral 848 is a second interlayer insulating film, and servesas a flattening film to flatten level differences formed by the TFT.Preferably, an organic resin film, such as polyimide, polyamide, acrylicresin, or BCB (benzocyclobutene) is used as the second interlayerinsulating film 848. These films have an advantage in that a good smoothplane can be easily formed, and the dielectric constant is low. It ispreferable to entirely absorb the to level difference caused by the TFTby means of the second interlayer insulating film 848 because the ELlayer is very sensitive to ruggedness. Additionally, it is preferable toform a low-dielectric constant material thick, in order to decrease theparasitic capacitance formed between the gate wiring line or the datawiring line and the cathode of the EL element. Therefore, preferably,the film thickness thereof is 0.5-5 μm (1.5-2.5 μm preferably).

Reference numeral 849 is a pixel electrode (anode of the EL element)that is made of a transparent conductive film. After a contact hole(opening) is made in the second interlayer insulating film 848 and thefirst passivation film 847, the electrode is connected to the drainwiring line 832 of the current controlling TFT 8202 through the opening.When the pixel electrode 849 and the drain region 827 are arranged notto be connected directly, as in FIG. 21, the alkali metal of the ELlayer can be prevented from entering the active layer via the pixelelectrode.

A third interlayer insulating film 850 whose thickness is 0.3-1 μm isdisposed on the pixel electrode 849. The film 850 is made of a siliconoxide film, a silicon nitride oxide film, or an organic resin film. Thethird interlayer insulating film 850 is provided with an opening on thepixel electrode 849 by etching, and the edge of the opening is etched tohave a taper shape. Preferably, the angle of the taper is 10-60° (30-50°preferably).

An EL layer 851 is formed on the third interlayer insulating film 850.The EL layer 851 is used in the form of a single-layer structure or alayered structure. The layered structure is superior in luminousefficiency. Generally, a positive hole injection layer/a positive holetransporting layer/a luminescent layer/an electronic transporting layerare formed on the pixel electrode in this order. Instead, a structuremay be used which has the order of positive hole transportinglayer/luminescent layer/electronic transporting layer or the order ofpositive hole injection layer/positive hole transportinglayer/luminescent layer/electronic transporting layer/electronicinjection layer. In the present invention, any one of the knownstructures can be used, and fluorescent coloring matter, etc., can bedoped to the EL layer.

The structure of FIG. 21 is an example in which the method of formingthree kinds of EL elements that correspond to RGB is used. Only onepixel is shown in FIG. 21. In fact, to pixels, each having the samestructure, are formed to correspond to each color of red, green, andblue, and thereby color display can be performed. The present inventioncan be performed regardless of the luminescence method.

A cathode 852 of the EL element is disposed on the EL layer 851. Amaterial that includes magnesium (Mg), lithium (Li) or calcium (Ca) thatis small in work function is used as the cathode 852. Preferably, use ismade of an electrode made of MgAg (material in which Mg and Ag are mixedin the ratio of Mg:Ag=10:1). Instead, a MgAgAl electrode, a LiAlelectrode, or LiFAl electrode can be used.

The EL element 8206 is formed by the pixel electrode (anode) 849, the ELlayer 851 and the cathode 852.

It is necessary to form a laminate structure comprised of the EL layer851 and the cathode 852 by each pixel individually. However, the ELlayer 851 is quite weak to water, and a normal photolithographytechnique cannot be used. Therefore, it is preferable to use a physicalmask material, such as metal mask, and selectively form it according toa vapor phase method, such as a vacuum deposition method, a sputteringmethod, or a plasma CVD method.

It is also possible to use an ink jet method, a screen printing method,spin coating method, and the like, as the method of selectively formingthe EL layer. However, these methods cannot continuously form thecathode in the current state of the art, and it can be said that themethod described above, not the ink jet method, etc., is desirable.

Reference numeral 853 is a protective electrode. This is to protect thecathode 852 from outside water, etc., and, at the same time, connect thecathode 852 of each pixel. For the protective electrode 853, it ispreferable to use a low-resistance material including aluminum (Al),copper (Cu), or silver (Ag). A cooling effect to lower the heat of theEL layer can be expected from the protective electrode 853.

Reference numeral 854 is a second passivation film, and, preferably, thefilm thickness thereof is 10 nm-1 μm (200-500 nm preferably). A mainpurpose to dispose the second passivation film 854 is to protect the ELlayer 851 from water. It is also effective to give it a cooling effect.However, the EL layer is weak to heat as mentioned above, and filmformation should be performed at a low temperature (ranging from a roomtemperature to 120° C. preferably). Therefore, it can be said that adesirable film formation method is the plasma CVD method, sputteringmethod, vacuum deposition method, ion plating method, or solutionapplication method (spin coating method).

Needless to say, all the TFTs shown in FIG. 21 have the poly-siliconfilms used in the present invention as active layers.

The present invention is not limited to the structure of the EL displaydevice of FIG. 21. The structure of FIG. 21 is only one of thepreferable form for operating the present invention.

The structure which is shown in this embodiment can be freely combinedwith Embodiment 1 or Embodiment 2.

Embodiment 5

An embodiment of the present invention will be described a method ofsimultaneously manufacturing TFTs of a pixel portion and a drivercircuit portion around the pixel portion. Concerning the driver circuit,a CMOS circuit that is a base unit is shown in the figure, for a briefdescription.

First, a substrate 501 in which a base film (not shown) is disposed onthe surface thereof is prepared as shown in FIG. 8A. In this embodiment,a silicon nitride oxide film whose thickness is 200 nm and anothersilicon nitride oxide film whose thickness is 100 nm are laminated andare used as a base film on a crystallized glass. At this time,preferably, the concentration of nitrogen of the film contacting thecrystallized glass substrate is kept to 10-25 wt %. It is possible toform an element directly on the quartz substrate without any base film,of course.

Thereafter, an amorphous silicon film 502 whose thickness is 45 nm isformed on the substrate 501 by a well-known film formation method. Thereis no need to limit it to the amorphous silicon film. Instead, asemiconductor film (including a micro-crystal semiconductor film) thathas an amorphous structure can be used in this embodiment. A compoundsemiconductor film that has an amorphous structure, such as an amorphoussilicon germanium film, also can be used herein.

Concerning the steps from here to FIG. 8C, it is possible to completelycite Japanese Laid-open Patent Publication No. 10-247735 filed by thepresent applicant. This publication discloses a technique concerning amethod of crystallizing a semiconductor film, which uses an element,such as Ni, as a catalyst.

First, a protective film 504 that has openings 503 a and 503 b isformed. A silicon oxide film 150 nm thick is used in this embodiment. Alayer 505 that contains nickel (Ni) is formed on the protective film 504by a spin coating method. Concerning the formation of the Ni containinglayer, reference can be made to the above publication.

Thereafter, as shown in FIG. 8B, heating processing at 570° C. for 14hours is performed in an inert atmosphere, and the amorphous siliconfilm 502 is crystallized. At this time, crystallization progressesschematically in parallel with the substrate, starting from regions 506a and 506 b (hereinafter, designated as Ni addition region) with whichNi is in contact. As a result, a polysilicon film 507 is formed that hasa crystal structure in which rod-like crystals gather and form lines.

Thereafter, as shown in FIG. 8C, an element (phosphorus preferably) thatbelongs to 15-group is added to the Ni addition regions 506 a and 506 b,while leaving the protective film as a mask. Regions 508 a and 508 b(hereinafter, designated as phosphorus addition region) to whichphosphorus was added at high concentration are thus formed.

Thereafter, heat processing at 600° C. for 12 hours is performed in aninert atmosphere as shown in FIG. 8C. Ni existing in the polysiliconfilm 507 is moved by this heat processing, and almost all of them arefinally captured by the phosphorus addition regions 508 a and 508 b asshown by the arrow. It is thought that this is a phenomenon caused bythe gettering effect of a metallic element (Ni in this embodiment) byphosphorus.

By this process, the concentration of Ni remaining in the polysiliconfilm 509 is reduced to at least 2×10¹⁷ atoms/cm³ according to themeasurement value by SIMS (secondary ion-mass spectrography). AlthoughNi is a lifetime killer for a semiconductor, no adverse influence isgiven to the TFT characteristic when it is decreased to this extent.Additionally, since this concentration is the measurement limit of theSIMS analysis in the current state of the art, it will show an evenlower concentration (less than 2×10¹⁷ atoms/cm³) in practice.

The polysilicon film 509 can be thus obtained that is crystallized by acatalyst and is decreased to the level in which the catalyst does notobstruct the operation of a TFT. Thereafter, active layers 510-513 thatuse the polysilicon film 509 only are formed by a patterning process. Atthis time, a marker to conduct mask alignment in the followingpatterning should be formed by using the above polysilicon film. (FIG.8D)

Thereafter, a silicon nitride oxide film 50 nm thick is formed by theplasma CVD method as shown in FIG. 8E, heating processing at 950° C. for1 hour is then performed in an oxidation atmosphere, and a thermaloxidation process is performed. The oxidation atmosphere can be anoxygen atmosphere or another oxygen atmosphere in which halogen isadded.

In this thermal oxidation process, the oxidation progresses in theinterface between the active layer and the silicon nitride oxide film,and a polysilicon film whose thickness is about 15 nm is oxidized, sothat a silicon oxide film whose thickness is about 30 nm is formed. Thatis, a gate insulating film 514 of a thickness of 80 nm is formed inwhich the silicon oxide film 30 nm thick and the silicon nitride oxidefilm 50 nm thick are laminated. The film thickness of the active layers510-513 is made 30 nm by the thermal oxidation process.

Thereafter, as shown in FIG. 9A, a resist mask 515 is formed, and animpurity element (hereinafter, designated as p-type impurity element)that gives the p-type through the medium of the gate insulating film 514is added to active layers 511 to 513. As the p-type impurity element, anelement that belongs to 13-group representatively, boron or galliumtypically, can be used. This (called a channel dope process) is aprocess for controlling the threshold voltage of a TFT.

In this embodiment, boron is added by the ion dope method in whichplasma excitation to is performed without the mass separation ofdiborane (B₂H₆). The ion implantation method that performs the massseparation can be used, of course. According to this process, impurityregions 516 to 518 are formed that include boron at the concentration of1×10¹⁵ to 1×10¹⁸ atoms/cm³ (5×10¹⁶ to 5×10¹⁷ atoms/cm³representatively).

Thereafter, resist masks 519 a and 519 b are formed as shown in FIG. 9B,and an impurity element (hereinafter, designated as n-type impurityelement) that gives the n-type through the medium of the gate insulatingfilm 514 is added. As the n-type impurity element, an element thatbelongs to 15-group representatively, phosphorus or arsenic typically,can be used. In this embodiment, a plasma doping method in which plasmaexcitation is performed without the mass separation of phosphine (PH₃)is used. Phosphorus is added in the concentration of 1×10¹⁸ atoms/cm³.The ion implantation method that performs mass separation can be used,of course.

A dose amount is adjusted so that the n-type impurity element isincluded in the n-type impurity regions 520, 521 formed by this processat the concentration of 2×10¹⁶-5×10¹⁹ atoms/cm³ (5×10¹⁷-5×10¹⁸ atoms/cm³representatively).

Thereafter, a process is performed for activating the added n-typeimpurity element and the added p-type impurity element as shown in FIG.9C. There is no need to limit the activation means, but, since the gateinsulating film 514 is disposed, the furnace annealing process that usesan electro-thermal furnace is desirable. Additionally, it is preferableto perform heat processing at a temperature as high as possible becausethere is a possibility of having damaged the interface between theactive layer and the gate insulating film of a part that is a channelformation region in the process of FIG. 9A.

Since the crystallized glass with high heat resistance is used in thisembodiment, the activating process is performed by the furnace annealingprocessing at 800° C. for 1 hour. The thermal oxidation can be performedkeeping a processing atmosphere in an oxidizing atmosphere, or the heatprocessing can be performed in an inert atmosphere.

This process clarifies the edge of the n-type impurity regions 520, 521,namely, the boundary (junction) between the n-type impurity regions 520,521 and the region (p-type impurity region formed by the process of FIG.9A) around the n-type impurity regions 520, 521, where the n-typeimpurity element is not added. This means that the LDD region and thechannel formation region can form an excellent junction when a TFT islater completed.

Thereafter, a conductive film 200-400 nm thick is formed, and patterningis performed, so that gate electrodes 522-525 are formed. According tothe width of gate electrodes 522 to 525, the channel length of each TFTsare decided.

The gate electrode can be made of a conductive film of a single-layerpreferably, a lamination film, such as two-layer or three-layer film, isused when necessary. Specifically, use can be made of a film of anelement selected from the group of consisting of aluminum (Al), tantalum(Ta), titanium (Ti), molybdenum (Mo), tungsten (W), chrome (Cr), andsilicon (Si); a film of a nitride of the aforementioned elements(tantalum nitride film, tungsten nitride film, or titanium nitride filmrepresentatively); an alloy film of a combination of the aforementionedelements (Mo—W alloy or Mo—Ta alloy representatively); or, a silicidefilm of the aforementioned elements (tungsten silicide film or titaniumsilicide film representatively). They can have a single-layer structureor a lamination-layer structure, of course.

In this embodiment, a lamination film is used that is made of a tungstennitride (WN) film 50 nm thick and a tungsten (W) film 350 nm thick. Thiscan be formed by the sputtering method. By adding an inert gas, such asXe or Ne, as a spattering gas, the film can be prevented from peelingoff because of stress.

At this time, the gate electrodes 523, 525 are formed to overlap withpart of the n-type impurity regions 520, 521, respectively, with thegate insulating film 514 therebetween. The overlapping part is latermade an LDD region overlapping with the gate electrode. According to thesectional view of the figure, the gate electrodes 524 a and 524 b areseen as separate, in fact, they are connected electrically to eachother.

Thereafter, with the gate electrodes 522-525 as masks, an n-typeimpurity element (phosphorus in this embodiment) is addedself-adjustably, as shown in FIG. 10A. At this time, an adjustment isperformed so that phosphorus is added to the thus formed impurityregions 527-533 at the concentration of ½- 1/10 (⅓-¼ representatively)of that of the n-type impurity regions 520, 521. Preferably, theconcentration is 1×10¹⁶-5×10¹⁸ atoms/cm³ (3×10¹⁷-3×10²⁰ atoms/cm³typically).

Thereafter, as shown in FIG. 10B, resist masks 534 a-534 d are formed tocover the gate electrode, an n-type impurity element (phosphorus in thisembodiment) is then added, and impurity regions 535-541 including a highconcentration of phosphorus are formed. The ion dope method usingphosphine (PH₃) is applied also herein, and an adjustment is performedin order that the concentration of phosphorus in these regions is1×10²⁰-1×10¹⁸ atoms/cm³ (2×10²⁰-5×10²⁰ atoms/cm³ representatively).

A source region or a drain region of the n-channel type TFT is formedthrough this process, and the switching TFT leaves a part of the n-typeimpurity regions 530-532 formed in the process of FIG. 10A. The leftregion corresponds to the LDD regions of the switching TFT.

Thereafter, as shown in FIG. 10C, the resist masks 534 a-534 d areremoved, and a resist mask 543 is newly formed. A p-type impurityelement (boron in this embodiment) is then added, and impurity regions544, 545 including a high concentration of boron are formed. Herein,according to the ion dope method using diborane (B₂H₆), boron is addedto obtain a concentration of 3×10²⁰-3×10²¹ atoms/cm³ (5×10²⁰-1×10²¹atoms/cm³ representatively).

Phosphorus has been already added to the impurity regions 544, 545 at aconcentration of 1×10²⁰-1×10²¹ atoms/cm³. Boron added herein has atleast three times as high concentration as the added phosphorus.Therefore, the impurity region of the n-type formed beforehand iscompletely changed into that of the p-type, and functions as an impurityregion of the p-type.

Thereafter, as shown in FIG. 10D, the resist mask 543 is removed, andthen a first interlayer insulating film 546 is formed. As the firstinterlayer insulating film 546, an insulating film that includes siliconis used in the form of a single-layer structure or a laminate structureas a combination thereof. The film thickness thereof can be 400 nm-1.5μm. In this embodiment, a structure is created in which an 800 nm-thicksilicon oxide film is stacked on a 200 nm-thick silicon nitride oxidefilm.

Thereafter, the n-type or p-type impurity element added at eachconcentration is activated. The furnace annealing method is desirable asan activation means. In this embodiment, heat treatment is performed at550° C. for 4 hours in a nitrogen atmosphere in an electro-thermalfurnace.

Heat treatment is further performed at 300-450° C. for 1-12 hours in anatmosphere that includes hydrogen of 3-100% for hydrogenation. This is aprocess to hydrogen-terminate an unpaired connector of a semiconductorfilm by thermally excited hydrogen. As another means for hydrogenation,plasma hydrogenation (hydrogen excited by plasma is used) can beperformed.

Hydrogenation can be performed during the formation of the firstinterlayer insulating film 546. In more detail, the 200 nm-thick siliconnitride oxide film is formed, and hydrogenation is performed asmentioned above, and thereafter the remaining 800 nm-thick silicon oxidefilm can be formed.

Thereafter, as shown in FIG. 11A, contact holes are made in the firstinterlayer insulating film 546, and source wiring lines 547-550 anddrain wiring lines 551-553 are formed. In this embodiment, thiselectrode is formed with a lamination film of a three-layer structure inwhich a 100 nm-thick Ti film, a 300 nm-thick aluminum film that includesTi, and a 150 nm-thick Ti film are continuously formed according to thesputtering method. Other conductive films can be used, of course.

Thereafter, a first passivation film 554 is formed to be 50-500 nm thick(200-300 am thick representatively). In this embodiment, a 300 nm-thicksilicon nitride oxide film is used as the first passivation film 554. Asilicon nitride film can be substituted for this.

At this time, it is effective to perform plasma treatment by the use ofgas that includes hydrogen, such as H₂ or NH₃, prior to the formation ofthe silicon nitride oxide film. Hydrogen excited by this pre-process issupplied to the first interlayer insulating film 546, and, through heattreatment, the film quality of the first passivation film 554 isimproved. At the same time, since hydrogen that is added to the firstinterlayer insulating film 546 diffuses onto the lower side, the activelayer can be effectively hydrogenated.

Thereafter, as shown in FIG. 11B, a second interlayer insulating film555 made of organic resin is formed. Polyimide, acrylic fiber, or BCB(benzocyclobutene) can be used as the organic resin. Especially, sincethe second interlayer insulating film 555 is required to flatten thelevel differences formed by TFTs, an acrylic film excellent insmoothness is desirable. An acrylic film is formed to be 2.5 μm thick inthis embodiment.

Thereafter, contact holes that reach the drain wiring line 553 are madein the second interlayer insulating film 555 and the first passivationfilm 553, and a protective electrode 556 is formed. A conductive filmwhich is made of almost aluminum can be used as protective electrode556. A protective electrode 556 can be made by vacuum deposition method.

Thereafter, an insulating film (a silicon oxide film in this embodiment)that includes silicon is formed to be 500 nm thick, an opening is thenformed at the position corresponding to the pixel electrode, and a thirdinterlayer insulating film 557 is formed. It is possible to easily forma tapered sidewall by using the wet etching method when the opening isformed. If the sidewall of the opening does not have a sufficientlygentle slope, deterioration of the EL layer caused by level differenceswill lead to an important problem.

Thereafter, a cathode (MgAg electrode) 558 is continuously formed by thevacuum deposition method. Preferably, the thickness of the cathode 558is 180-300 nm (200-250 nm typically).

Next, an EL layer 559 is made without air exposure by the vacuumdeposition method. The film thickness of the EL layer 559 is 800-200 nm(100-120 nm typically), and that of the pixel electrode (anode) 560 canbe 110 nm.

In this process, an EL layer and a pixel electrode (anode) aresequentially formed for a pixel corresponding to red, a pixelcorresponding to green, and a pixel corresponding to blue. However,since the EL layer is poor in tolerance to solutions, they must beindependently formed for each color without using the photolithographytechnique. Thus, it is preferable to conceal pixels except a desired oneby the use of the metal mask, and selectively form an EL layer and apixel electrode (anode) for the desired pixel.

In detail, a mask is first set for concealing all pixels except a pixelcorresponding to red, and an EL layer and a pixel electrode (anode) ofred luminescence are selectively formed by the mask. Thereafter, a maskis set for concealing all pixels except a pixel corresponding to green,and an EL layer and pixel electrode (anode) of green luminescence areselectively formed by the mask. Thereafter, as above, a mask is set forconcealing all pixels except a pixel corresponding to blue, and an ELlayer and a pixel electrode (anode) of blue luminescence are selectivelyformed by the mask. In this case, the different masks are used for therespective colors. Instead, the same mask may be used for them.Preferably, processing is performed without breaking the vacuum untilthe EL layer and the pixel electrode (anode) are formed for all thepixels. Preferably, it is continuously formed without air exposure afterthe EL layer and the pixel electrode (anode) are formed.

A known material can be used for the EL layer 559. Preferably, as aknown materials, that is an organic material in consideration of drivingvoltage. For example, the EL layer can be formed with a four-layerstructure consisting of a positive hole injection layer, a positive holetransporting layer, a luminescent layer, and an electronic injectionlayer. Further, as the EL element of pixel electrode (cathode) 560,indium oxide and tin oxide (ITO) film is formed. A transparentconductive layer which is mixed zinc oxide (ZnO) of 2-20% can be used toindium oxide. Other known material can be used.

Lastly, the second passivation film 561 made of silicon nitride film isformed 300 nm thick.

An EL display device constructed as shown in FIG. 11C is completed. Inpractice, preferably, the device is packaged (sealed) by a highlyairtight protective film (laminate film, ultraviolet cured resin film,etc.) or a housing material such as a ceramic sealing can, in order notto be exposed to the air when completed as shown in FIG. 11C. In thatsituation, the reliability (life) of the EL layer is improved by makingthe inside of the housing material an inert atmosphere or by placing ahygroscopic material (for example, barium oxide) therein.

After airtightness is improved by, for example, packaging, a connector(flexible print circuit: FPC) for connecting a terminal drawn from theelement or circuit formed on the substrate to an external signalterminal is attached, and a product is completed. In this specification,the EL display device, thus wholly prepared for market, is called ELmodule.

The structure shown in this embodiment can be freely combined withembodiment 1 or embodiment 2.

Embodiment 6

In Embodiment 6, a structure of the EL display will be explained byusing a perspective view of FIG. 12.

The EL display according to Embodiment 6 formed on a glass substrate3201 comprises a pixel portion 3202, a gate signal side driver circuit3203, a source signal side driver circuit 3204. The switching TFT 3205of the pixel portion 3202 is an n-channel type TFT and is arranged on across point of the gate signal line 3206 connected to the gate signalside driver circuit 3203 and of the source signal line 3207 connected tothe source signal side driver circuit 3204. Furthermore, the drainregion of the switching TFT 3205 is connected to the gate of the ELdriving TFT 3208.

Furthermore, the source region of the EL driving TFT 3208 is connectedto the power source supply line 3209. Furthermore, a capacitor 3216connected to the gate region of the EL driving TFT 3208 and the powersource supply line 3209 is provided. In Embodiment 6, the power sourcepotential is applied to the power source supply line 3209. In addition,the opposite electrode (the cathode in Embodiment 6) of the EL element3211 is held at this stationary potential (0 V in Embodiment 6).

Then, on an FPC 3212 which serves as an external input and outputterminal, input and output wirings (connection wirings) 3213, 3214 fortransmitting a signal to a driver circuit and an input and output wiring3215 connected to the power source supply line 3209, are provided.

Furthermore, the EL module according to Embodiment 6 including a housingmaterial will be explained by using FIGS. 13A and 13B. Note that,depending upon the need, reference numeral used in FIG. 12 will becited.

On the glass substrate 3201, a pixel portion 3202, a gate signal sidedriver circuit 3203 and a source signal side driver circuit 3204 areformed. Each kind of wiring from respective driver circuits is extendedto the FPC 3212 via the input and output wirings 3213 to 3215 and isconnected to the external device.

At this time, the housing material 3304 is provided in such a manner atleast that the pixel portion 3202, preferably the driver circuits 3203and 3204 and the pixel portion 3302 are surrounded by the housingmaterial 3304. Note that, the housing material 3304 has a configurationhaving a recessed portion with an inner diameter larger than theexternal diameter of the EL element or a sheet configuration, so thatthe housing material is fixed on the glass substrate 3201 by an adhesive3305, in such a manner that a closed space is formed in cooperation withthe glass substrate 3201. At this time, the EL element is being closedin the closed space to be completely shielded from the externalatmosphere. Note that, the housing materials 3304 may be provided inplurality.

Furthermore, the material quality of the housing material 3304 ispreferably an insulation material such as glass, polymer or the like.For example, non-crystal glass (borosilicate glass, quartz or the like),crystalline glass, ceramic glass, organic resin (acrylic resin, styreneresin, polycarbonate resin, epoxy resin or the like) and silicone resincan be given. Furthermore, ceramics may be used. Furthermore, when theadhesive 3305 is an insulation material, a metal material such asstainless alloy or the like can be used as well.

Furthermore, bonding agents epoxy resin, acrylate resin or the like canbe used as the material quality of the adhesive 3305. Furthermore, it ispossible to use thermosetting resin, and light-setting resin as thebonding agent. However, it is required that the material is of qualitywhich does not permeate oxygen or water as much as possible.

Furthermore, it is desired that a gap 3306 between the housing material3304 and the glass substrate 3201 is filled with inert gas (argon,helium, nitrogen or the like). Besides, it is also possible to use inertliquid (liquid carbon fluoride or the like represented byperfluoroalkane) in addition to gas. With respect to inert liquid, thematerial used in Japanese Patent Application Laid-open No. 8-78519 maybe used.

Furthermore, it is also effective to provide a dry agent in the gap3306. As the dry agent, a material described in Japanese PatentApplication Laid-open No. 9-148006 can be used. Generally, barium oxideis used.

Note that, as shown in FIG. 13B, on the pixel portion, a plurality ofpixels are provided which have individually isolated EL element. Thesepixels have all protection electrodes 3307 as common electrodes. InEmbodiment 6, it is described that preferably the EL layer, the cathode(an MgAg electrode) and the protection electrode are continuously formedwithout air release. Though the EL layer and the cathode are formed ofthe same mask material, only the protection electrode may be formed of adifferent mask material.

At this time, the EL layer and the cathode needs to be provided only onthe pixel portion. It is not required that the EL layer and the cathodeare provided on the driver circuit. Needless to say, no problem ariseswhen the EL layer and the cathode are provided on the driver circuit.When it is considered that the EL layer includes alkaline metal,preferably the EL layer and the cathode are not provided on the drivercircuit.

Note that, the protection electrode 3307 is connected to the input andoutput wiring 3310 via a connection wiring 3309 formed of the samematerial as the pixel electrode in the region shown by reference numeral3308. The input and output wiring 3310 is a power source supply line forapplying a power source potential to the protection electrode 3307, andis connected to the FPC 3212 via the conductive paste material 3311.

The structure shown in Embodiment 6 can be put into effect in a freecombination with Embodiment 1.

Embodiment 7

In Embodiment 7, there will be explained a structure of a pixel of an ELdisplay according to the present invention.

On the pixel portion of the EL display according to the presentinvention, a plurality of pixels are arranged in a matrix-likeconfiguration. FIG. 17A shows an example of a circuit diagram of thepixel. In the pixel 1000, a switching TFT 1001 is provided in FIG. 17A.Note that, in the present invention, as a switching TFT 1001, either ann-channel type TFT or a p-channel type TFT may be used. In FIG. 17A, then-channel type TFT is used as the switching TFT 1001. The gate electrodeof the switching TFT 1001 is connected to the gate signal line 1002 forinputting a gate signal. One of the source region and the drain regionof the switching TFT 1001 is connected to the data signal line (alsoreferred to as source signal line) 1003 for inputting either an analogor a digital video signal while the other is connected to the gateelectrode of the EL driving TFT 1004.

One of the source region and the drain region of the EL driving TFT 1004is connected to the power source supply line 1005 while the other isconnected to the EL element 1006.

The EL element 1006 comprises an anode, a cathode an EL layer providedbetween the anode and the cathode. Note that, according to the presentinvention, in the case where the anode is a pixel electrode and thecathode is an opposite electrode, either the source region or the drainregion of the EL driving TFT 1004 is connected to the anode of the ELelement 1006. On the contrary, in the case where the anode is theopposite electrode and the cathode is the pixel electrode, either thesource region or the drain region of the EL driving TFT is connected tothe cathode of the EL element 1006. Note that, as the EL driving TFT1004, either n-channel type TFT or p-channel type TFT may be used.However, in the case where the anode of the EL element 1006 is the pixelelectrode and the cathode is the opposite electrode, it is preferablethat the EL driving TFT 1004 is the p-channel type TFT. Furthermore, onthe contrary, in the case where the anode of the EL element 1006 is theopposite electrode, and the cathode is the pixel electrode, it ispreferable that the EL driving TFT 1004 is an n-channel type TFT. InFIG. 17A, the p-channel type TFT is used as the EL driving TFT 1004. Thecathode of the EL element 1006 is connected to the stationary powersource 1007.

Furthermore, an LDD region may be provided in the active layer of the ELdriving TFT 1004, and a region (an Lov region) may be formed wherein theLDD region and the gate electrode are overlapped via the gate insulatingfilm. In the case where the EL driving TFT 1004 is particularly then-channel type TFT, the Lov region is formed on the side of the drainregion of the active layer, with the result that the on current can beincreased, and a capacity can be further formed between the gateelectrode of the EL driving TFT 1004 and the Lov region.

Furthermore, in the case where the switching TFT 1001 is set in thenon-selection state (off state), a capacitor may be provided to hold thegate voltage of the EL driving TFT 1004. In the case where the capacitoris provided, the capacitor is connected between the side of the sourceregion or the drain region of the switching TFT 1001 which is notconnected to the source signal line, and the power supply line 1005. Ina circuit diagram shown in FIG. 17A, the power source supply line 1005is arranged in parallel with the source signal line 1003.

In order to use the Lov region of the EL driving TFT as a capacitor forholding the gate voltage of the EL driving TFT 1004, a capacity value ofabout 19.8 fF is required in the case where the pixel size is 22 μm×22μm, the thickness of the gate insulating film is 800 Å and the relativedielectric constant of the gate insulating film is 4.1. Consequently, asthe area of the Lov region (an area in which the LDD region and the gateelectrode are overlapped via the gate insulating film), an area of about66 μm² is required.

Note that, in the circuit diagram shown in FIG. 17A, either theswitching TFT 1001 or the EL driving TFT 1004 may be formed into amulti-gate structure (a structure including an active layer having twoor more channel formation regions connected in series). FIG. 18A shows acircuit diagram of a pixel in which the switching TFT 1001 of the pixelshown in FIG. 17A is formed into a multi-gate structure.

The switching TFT 1001 a and the switching TFT 1001 b are connected inseries to be provided in FIG. 18A. Except for the switching TFT 1001 aand the switching TFT 1001 b, the structure is the same as the circuitdiagram shown in FIG. 17A. By forming the switching TFT into amulti-gate structure (a structure including an active layer having twoor more channel formation regions connected in series), the off currentcan be decreased. Note that, in FIG. 18A a double-gate structure isadopted. However, Embodiment 7 is not restricted to the double-gate. Anymulti-gate structure may be used.

Besides, though not shown, in the case where the EL driving TFT isformed into a multi-gate structure, the deterioration of the EL drivingTFT by heat can be suppressed.

Next, FIG. 17B shows another example of the circuit diagram of the pixelaccording to the present invention. In FIG. 17B, the switching TFT 1101is provided in the pixel 1100. Note that, in the present invention,either the n-channel type TFT or the p-channel type TFT may be used asthe switching TFT 1101. In FIG. 17B, the n-channel type TFT is used asthe switching TFT 1101. The gate electrode of the switching TFT 1101 isconnected to the gate signal line 1102 for inputting the gate signal.One of the source region and the drain region of the switching TFT 1101is connected to the digital data signal line (also referred to as asource signal line) 1103 for inputting either an analog or a digitalvideo signal while the other is connected to the gate electrode of theEL driving TFT 1104.

Then, one of the source region and the drain region of the EL drivingTFT 1104 is connected to the power source supply line 1105 while theother is connected to the EL element 1106.

The EL element 1106 comprises an anode, a cathode and an EL layerprovided between the positive layer and the negative layer. Note that,in the present invention, in the case where the anode is the pixelelectrode and the cathode is the opposite electrode, either the sourceregion or the drain region of the EL driving TFT 1104 is connected tothe anode of the EL element 1106. On the contrary, in the case where theanode is the opposite electrode and the cathode is the pixel electrode,either the source region or the drain region of the EL driving TFT 1104is connected to the cathode of the EL element 1106. Note that, as the ELdriving TFT 1104, either the n-channel type TFT or the p-channel typeTFT may be used. However, in the case where the anode of the EL element1106 is the pixel electrode to and the cathode thereof is the oppositeelectrode, it is preferable that the EL driving TFT 1104 is thep-channel type TFT. Furthermore, on the contrary, in the case where theanode of the EL element 1106 is the opposite electrode and the cathodethereof is the pixel electrode, it is preferable that the EL driving TFT1104 is the n-channel type TFT. In FIG. 17B, the p-channel type TFT isused in the EL driving TFT 1104. The cathode of the EL element 1106 isconnected to the stationary power source 1107.

Besides, the LDD region is provided in the active layer of the ELdriving TFT 1104 so that a region (Lov region) may be formed wherein theLDD region and the gate electrode are overlapped via the gate insulatingfilm. In the case where the EL driving TFT 1104 is particularly then-channel type TFT, the on current can be increased by forming the Lovregion on the side of the drain region in the active layer. Furthermore,a capacity may be formed between the gate electrode of the EL drivingTFT 1104 and the Lov region.

Furthermore, when the switching TFT 1101 is set in the non-selectionstate (off state), a capacitor may be provided to hold the gate voltageof the EL driving TFT 1104. In the case where the capacitor is provided,the capacitor is connected between the side of the source region or thedrain region of the switching TFT 1101 which is not connected to thesource signal line, and the power source supply line 1105. In thecircuit diagram shown in FIG. 17B, the power source supply line 1105 andthe gate signal line 1102 are arranged in parallel.

Note that, in the circuit diagram shown in FIG. 17B, either theswitching TFT 1101 or the EL driving TFT 1104 may be formed into amulti-gate structure. FIG. 18B shows a circuit diagram of a pixel inwhich the switching TFT 1101 of the pixel shown in FIG. 17B is formedinto a multi-gate structure.

The switching TFT 1101 a and the switching TFT 1101 b are connected inseries and provided. Except for the switching TFTs 1101 a and 1101 b,the structure is the same as the circuit diagram shown in FIG. 17B. Theoff current can be lowered by forming the switching TFT into themulti-gate structure. Note that, a double-gate structure is provided inFIGS. 18A and 18B. However, the embodiment is not restricted to thedouble-gate structure. Any multi-gate structure may be used.

Besides, though not shown, in the case where the EL driving TFT isformed in a multi-gate structure, the deterioration of the EL drivingTFT by heat can be suppressed.

Next, FIG. 19A shows another example of a circuit diagram of a pixelaccording to the present invention. In FIG. 19A, the pixel 1200 and thepixel 1210 are provided adjacent to is each other. In FIG. 19A,reference numerals 1201 and 1211 denote switching TFTs. Note that, inthe present invention, as switching TFTs 1201 and 1211 either then-channel type TFT or the p-channel type TFT may be used. In FIG. 19A,the n-channel type TFT is used in the switching TFT 1201 and theswitching TFT 1211. The gate electrodes of the switching TFTs 1201 and1211 are connected to the gate signal line 1202 for inputting the gatesignal. One of the source region and the drain region of the switchingTFTs is connected to the data signal line (hereinafter referred to as asource signal line) for inputting an analog 1203 or a digital videosignal 1204 while the other is connected to the gate electrodes of theEL driving TFTs 1204 and 1214, respectively.

Then, one of the source region and the drain region of the EL drivingTFTs 1204 and 1214 is connected to the power source supply line 1220while the other is connected to the EL elements 1205 and 1215,respectively. In this manner, in Embodiment 7, two adjacent pixels shareone power source supply line 1220. As a consequence, as compared withthe structure shown in FIG. 17A to FIG. 18B, the number of the powersource supply lines can be decreased. When the ratio of the wiring withrespect to the whole pixel portion is small, the light shielding by thewiring can be suppressed in the case where the wiring is provided in adirection of the light emission of the EL layer.

The EL elements 1205 and 1215 comprise an anode, a cathode, and an ELlayer provided between the anode and the cathode respectively. Notethat, according to the present invention, in the case where the anode isthe pixel electrode and the cathode is the opposite electrode, eitherthe source region or the drain region of the EL driving TFTs 1204 andthe 1214 is connected to the anodes of the EL elements 1205 and 1215. Onthe contrary, in the case where the anode is the opposite electrode andthe cathode is the pixel electrode, either to the source region or thedrain region of the EL driving TFTs 1204 and 1214 is connected to thecathodes of the EL elements 1205 and 1215. Note that, as the EL drivingTFTs 1204 and 1214, either the n-channel type TFT or the p-channel typeTFT may be used. However, in the case where the anodes of the ELelements 1205 and 1215 are pixel electrodes while the cathodes thereofare opposite electrodes, it is preferable that the EL driving TFTs 1204and 1214 are the p-channel type TFTs. Besides, on the contrary, in thecase where the anodes of the EL elements 1205 and 1215 are the oppositeelectrodes and the cathodes thereof are the pixel electrodes, preferablythe EL driving TFTs 1204 and 1214 are n-channel type TFTs. In FIG. 19A,as the EL driving TFTs 1204 and 1214, the p-channel type TFTs are used.The cathodes of the EL elements 1205 and 1215 are connected to thestationary power sources 1206 and 1216.

Furthermore, an LDD region is provided in the active layers of the ELdriving TFTs 1204 and 1214 with the result that a region (a Lov region)may be formed wherein the LDD region and the gate electrode overlaps viathe gate insulating film. In the case where the EL driving TFT 1204 isparticularly the n-channel type TFT, the on current can be increased byforming the Lov region on the side of the drain region of the activelayer with the result that the capacity can be formed between the gateelectrode of the EL driving TFT 1204 and the Lov region.

Furthermore, when the switching TFT 1201 and 1211 are set in thenon-selection state (off state), a capacitor may be provided for holdingthe gate voltage of the EL driving TFTs 1204 and 1214. In the case wherethe capacitor is provided, the capacitor may be connected between theside of the drain region or the source region which is not connected tothe source signal line and the power source supply line 1220.

Note that, in a circuit diagram shown in FIG. 19A, the switching TFT1201 and 1211, or the EL driving TFT 1204 and 1214 may be formed into amulti-gate structure. FIG. 20A shows a circuit diagram of a pixel inwhich the switching TFTs 1201 and 1211 are formed into the multi-gatestructure of a pixel shown in FIG. 19A.

The switching TFT 1201 a and the switching TFT 1201 b are connected inseries to be provided. Furthermore, the switching TFT 1211 a and theswitching TFT 1211 b are connected in series to be provided. Except forthe switching TFTs 1201 a and 1201 b, and the switching TFTs 1211 a and1211 b, the structure is the same as the circuit diagram shown in FIG.19A. The off current can be lowered by forming the switching TFT into amulti-gate structure. Note that, in FIG. 20A, a double-gate structure isadopted, but Embodiment 7 is not limited to the double-gate structure.Any multi-gate structure may be used.

Besides, though not shown, in the case where the EL driving TFT isformed into a multi-gate structure, the deterioration of the EL drivingTFT by heat can be suppressed.

Next, FIG. 19B shows another example of a circuit diagram of a pixelaccording to the present invention. In FIG. 19B, the pixel 1300 and thepixel 1310 are provided adjacent to each other. In FIG. 19B, referencenumerals 1301 and 1311 denote the switching TFTs. Note that, in thepresent invention, as the switching TFT 1301 and 1311, either then-channel type TFT or the p-channel type TFT can be used. In FIG. 19B,the n-channel type TFT is used as the switching TFT 1301 and 1311. Thegate electrodes of the switching TFTs 1301 and the 1311 are connected tothe gate signal lines 1302 and 1312 for inputting the gate signalrespectively. One of the source region and the drain region of theswitching TFT 1301 and 1311 is connected to the data signal line 1303(also referred to as a source signal line) for inputting an analog ordigital video signal, while the other is connected to the gate electrodeof the EL driving TFTs 1304 and 1314 respectively.

Then, one of the source region and the drain region of the EL drivingTFTs 1304 and 1314 is connected to the power source supply line 1320,while the other is connected to the EL elements 1305 and 1315respectively. In this manner, in Embodiment 7, two adjacent pixels shareone power source supply line 1320. As a consequence, as compared withthe structure shown in FIGS. 17A to 18B, the number of power supplylines can be decreased. When the ratio of the wiring with respect to thewhole pixel portion is small, the light shielding by the wiring can besuppressed in the case where the wiring is provided in a direction oflight emission of the EL layer. Then, in a circuit diagram shown in FIG.20B, the power supply line 1320 is provided in parallel with the gatesignal lines 1302 and 1312.

The EL elements 1305 and 1315 comprise an anode, a cathode, and an ELlayer provided between the anode and the cathode respectively. Notethat, according to the present invention, in the case where the anode isthe pixel electrode and the cathode is an opposite is electrode, eitherthe source region or the drain region of the EL driving TFTs 1304 and1314 is connected to the anodes of the EL elements 1305 and 1315. On thecontrary, in the case where the anode is the opposite electrode and thecathode is the pixel electrode, either the source region or the drainregion of the EL driving TFTs 1304 and 1314 is connected to the cathodesof the EL elements 1305 and 1315. Note that, as the EL driving TFTs 1304and 1314, either the n-channel type TFT or the p-channel type TFT may beused. However, in the case where the anodes of the EL elements 1305 and1315 are pixel electrodes and the cathodes thereof are oppositeelectrodes, it is preferable that the EL driving TFT 1304 and 1314 arep-channel type TFTs. Besides, on the contrary, in the case where theanodes of the EL elements 1305 and 1315 are opposite electrodes and thecathodes thereof are pixel electrodes, it is preferable that the ELdriving TFTs 1304 and 1314 are n-channel type TFTs. In FIG. 19B, thep-channel type TFTs are used as the EL driving TFTs 1304 and 1314, sothat the cathodes of the EL elements 1305 and 1315 are connected to thestationary power sources 1306 and 1316.

Furthermore, an LDD region is provided in the active layers of the ELdriving TFTs 1304 and 1314, so that a region (the Lov region) may beformed wherein the LDD region and the gate electrode are overlapped viathe gate insulating film. In the case where the EL driving TFTs 1304 and1314 are particularly the n-channel type TFTs, the on current can beincreased by forming a Lov region on the side of the drain region of theactive layers. Besides, a capacity can be formed between the gateelectrodes of the EL driving TFT 1304 and 1314 and the Lov region.

Furthermore, when the switching TFT 1301 and 1311 are set in thenon-selection state (off-state), a capacitor may be provided for holdingthe gate voltage of the EL driving TFTs 1304 and 1314. In the case wherethe capacitor is provided, the capacitor is connected between the sideof the source region and the drain region which is connected to thesource signal line, and the power source supply line 1320.

Note that, in a circuit diagram shown in FIG. 19B, the switching TFTs1301 and 1311 or the EL driving TFTs 1304 and 1314 may be formed into amulti-gate structure. FIG. 20B shows a circuit diagram of a pixel inwhich the switching TFTs 1301 and 1311 of a pixel shown in FIG. 19B areformed into a multi-gate structure.

The switching TFT 1301 a and the switching TFT 1301 b are connected inseries to be provided. Furthermore, the switching TFTs 1311 a and 1311 bare connected in series to be provided. Except for the switching TFTs1301 a and 1311 b and the switching TFTs 1311 a and 1311 b, thestructure is the same as the circuit diagram shown in FIG. 19B. The offcurrent can be decreased by forming the switching TFTs in the multi-gatestructure. Note that, in FIG. 20B, the double-gate structure is adopted.But Embodiment 7 is not restricted to the double-gate structure. Anymulti-gate structure may be used.

Besides, though not shown, in the case where the EL driving TFT isformed into the multi-gate structure, the deterioration of the ELdriving TFTs by heat can be suppressed.

Note that, in Embodiment 7, a resistor may be provided between the pixelelectrodes the drain region of the EL driving TFT and the EL elementhave. By providing the resistor, the quantity of current supplied fromthe EL driving TFT to the EL element is controlled so that the influenceof the characteristic of the EL driving TFT on the disparity may beprevented. The resistor may be an element showing a resistance valuesufficiently larger than the on resistance of the EL driving TFT.Therefore, the structure or the like is not restricted. Note that, theon resistance is a value obtained by dividing the drain voltage of theTFT with the drain current which flows at that time when the TFT isturned on. As a resistance value of the resistor, any in the scope of 1kΩ through 50 MΩ (preferably, 10 kΩ through 10 MΩ, or more preferably 50kΩ through 1 MΩ) may be selected When a semiconductor layer having ahigh resistance value as a resistor is used, the formation is easy andpreferable.

The structure shown in Embodiment 7 can be put into practice in a freecombination with Embodiments 1, 3, 4, 5 or 6.

Embodiment 8

This invention can be operated not limited to organic EL material, butusing inorganic EL materials. Since the inorganic EL material of thepresent time is of a very high driving voltage, TFTs to be used musthave resisting-pressure characteristics resistible to such a drivingvoltage.

If an inorganic EL material of an even lower driving voltage isdeveloped in the future, it will be applicable to the present invention.

The structure of this embodiment can be freely combined with any one ofthe structures of Embodiments 1 through 7.

Embodiment 9

In the present invention, an organic material used as an EL layer may beeither a low molecular organic material or a polymer (high molecular)organic material. As the low molecular organic material, materials areknown centering on Alq₃ (tris-8-quinolylite-aluminum), TPD(triphenylamine derivative) or the like. As polymer organic material,δ-cooperative polymer materials can be given. Typically, PPV(polyphenylenevynilene), PVK (polyvynilcarbazole), polycarbonate or thelike can be given.

The polymer (high molecular) organic material can be formed with asimple thin film formation method such as the spin coating method (whichis referred to also as solution application method), the dispensemethod, the printing method, the ink jet method or the like. The polymerorganic material has a high heat endurance compared with the lowmolecular organic material.

Furthermore, in the case where the EL layer incorporated in the ELelement incorporated in the EL display according to the presentinvention has an electron transport layer and a positive hole transportlayer, the electron transport layer and the positive hole transportlayer may be formed of inorganic material such as, for example, anon-crystal semiconductor formed of non-crystal Si or non-crystalSi_(1-x)C_(x) or the like.

In the non-crystal semiconductor, a large quantity of trap level ispresent, and at the same time, the non-crystal semiconductor forms alarge quantity of interface levels at an interface at which thenon-crystal semiconductor contacts other layers. As a consequence, theEL element can emit light at a low voltage, and at the same time, anattempt can be made to provide a high luminance.

Besides, a dopant (impurity) is added to the organic EL layer, and thecolor of light emission of the organic EL layer may be changed. Thesedopant includes DCM1, nile red, lubren, coumarin 6, TPB andquinaquelidon.

Besides, the structure of Embodiment 9 may be combined freely with anyof the structures in Embodiments 1 through 7.

Embodiment 10

Next, there will be explained another method for driving the EL displayaccording to the present invention shown in FIGS. 1 to 2B. Here, therewill be explained a case in which 2_(n) gray scale full color display isprovided with the n-bit digital driving method. Note that, the timingchart is the same as the case shown in the embodiments. FIG. 3 will bereferred to.

In the pixel portion 101, a plurality of pixels 104 are arranged in amatrix-like configuration. FIG. 2A is an enlarged view of the pixels104. In FIG. 2A, reference numeral denotes a switching TFT. The gateelectrode of the switching TFT is connected to the gate signal line 106for inputting the gate signal. One of the source region and the drainregion of the switching TFT 105 is connected to the source signal line107 for inputting the digital data signal while the other is connectedto the gate electrode of the EL driving TFT and a capacitor 113incorporated in each pixel respectively.

Besides, one of the source region and the drain region of the EL drivingTFT 108 is connected to the power source supply line 111 while the otheris connected to the EL element 110. The power source supply line 111 isconnected to the capacitor 113. When the switching TFT 105 is set in thenon-selection state (off state), the capacitor 113 is provided forholding the gate voltage of the EL driving TFT 108.

The EL element 110 comprises an anode, a cathode, and an EL layerprovided between the anode and the cathode. In the case where the anodeis connected to the source region or the drain region of the EL drivingTFT 110, in other words, in the case where the anode is a pixelelectrode, the cathode, which is an opposite electrode is held at aconstant potential. On the contrary, in the case where the cathode isconnected to the source region or the drain region of the EL driving TFT110, in other words, in the case where the cathode is a pixel electrode,the anode, which is the opposite electrode 112 is held at a constantpotential.

The power source supply line 111 is held at a power source potential.

Note that, a resistor may be provided between the drain region or thesource region of the EL driving TFT 108 and the EL element 110. Byproviding the resistor, the quantity of current which is supplied fromthe EL driving TFT to the EL element is controlled with the result thatthe influence of the disparity of the characteristic of the EL drivingTFT can be prevented. No restriction is placed on the structure or thelike because an element may be used that which shows a resistance valuewhich is sufficiently larger than the on resistance of the EL drivingTFT 108. Note that, the on resistance refers to a value obtained bydividing the drain voltage of the TFT with the drain current which flowsat that time when the TFT is in an on state. A resistance value of theresistor may be selected from the scope of 1 kΩ through 50 MΩ(preferably 10 kΩ through 10 MΩ, and more preferably 50 kΩ through 1MΩ). When a semiconductor layer having a high resistance value as aresistor, the formation is easy and preferable.

FIG. 2B shows a structure of a pixel portion of the EL display accordingto the present invention. The gate signal lines (G1 through Gn) areconnected to the gate electrode of the switching TFT incorporated ineach pixel. One of the source region and the drain region of switchingTFT incorporated in each pixel is connected to the source signal lines(S1 through Sn) while the other is connected to the gate electrode ofthe EL driving TFT and the capacitor. Besides, one of the drain regionand the source region of the EL driving TFT is connected to the powersource supply lines (V1 through Vn) while the other is connected to theEL element incorporated in each pixel. The power source supply lines (V1through Vn) are also connected to the capacitor incorporated in eachpixel.

FIG. 3 shows a timing chart in the EL display shown in FIG. 2A. In thebeginning, one frame period (F) is divided into n sub-frame periods (SF1through SFn). Note that, the period in which all the pixels in a pixelportion display one image is referred to as one frame period. In the ELdisplay according to the present invention, 120 or more frame periodsare provided in one second. As a consequence, 60 or more images aredisplayed in one second.

When the number of images displayed in one second becomes 120 orsmaller, flickering of images, such as a flicker or the like begins tobecome visually conspicuous.

Note that, a plurality of periods into which one frame period is furtherdivided are referred to as sub-frame periods. With an increase in thenumber of gray scale levels the divided number of one frame periodincreases and the driver circuit must be driven at a high frequency.

One sub-frame period is divided into an address period (Ta) and asustain period (Ts). The address period refers to time required forinputting data to all the pixels while the sustain period (referred toalso as lighting period) refers to a period in which a display isprovided in one sub-frame period.

The lengths of the address periods (Ta1 through Tan) incorporated in nsub-frame periods (SF1 through SFn) have are all the same. The sustainperiods (Ts) which is incorporated in SF1 through SFn respectively areset to Ts1 through Tsn respectively.

The lengths of the sustain periods are set to be Ts1: Ts2: Ts3: . . . :Ts(n−1): Tsn=2⁰: 2⁻¹: 2⁻²: . . . : 2^(−(n-2)): 2^(−(n-1)). However, theorder in which SF1 through SFn are allowed to appear may be any. Adesired gray scale display can be given out of 2^(n) gray scale levelswith a combination of these sustain periods.

In the beginning, in an address period, the power source supply lines(V1 through Vn) are held at the power source potential having the sameheight as the stationary potential. In to this specification, the powersource potential in the digital driving address period is referred to asoff power source potential. Note that, the height of the off powersource potential may be set to the same height of the stationarypotential within the scope in which the EL element does not emit light.Note that, the EL driving voltage at this time is referred to as off ELdriving voltage. Ideally, it is desired that the off EL driving voltageis 0 V, but may be set to a level at which the EL element does not emitlight.

Then, the gate signal is input to the gate signal line G1, so that allthe switching TFT having the gate electrode connected to the gate signalline G1 are all turned on.

In the state in which the switching TFT having the gate electrodeconnected to the gate signal line G1 is turned on, the digital datasignal is input to the source signal lines (S1 through Sn) in order. Thedigital data signal has information of “0” or “1”. This means that thedigital data signal of “0” or “1” has a voltage of either Hi or Lorespectively. Then the digital data signals inputted to the sourcesignal lines (S1 through Sn) are inputted to the gate electrode of theEL driving TFT via the switching TFT in the on state. Besides, thedigital data signal is inputted to the capacitor and is held.

Next, the gate signal is inputted to the gate signal line G2, so thatall the switching TFTs having the gate electrode connected to the gatesignal line G2 are turned on. Then, in the state in which the switchingTFTs having the gate electrode connected to the gate signal line G2 areturned on, the digital signal is inputted in order to the source signallines (S1 through Sn). The digital data signal inputted to the sourcesignal lines (S1 through Sn) is inputted to the gate electrode of the ELdriving TFTs via the switching TFTs. Furthermore, the digital datasignal is also inputted to the capacitor and is held.

The above operation is repeated, so that the digital data signal isinputted to all the pixels. The period until the digital signal isinputted to all the pixels is referred to as the address period.

At the same time as when the address period is completed, the sustainperiod begins. When the sustain period begins, the potential of thepower supply lines (V1 through Vn) changes from the off power sourcepotential to the on power source potential. In this specification, thepower source potential in the digital driving sustain period is referredto as on power source potential. The on power source potential may besuch that a potential difference is present with the stationarypotential to such a degree that the EL element emits light. Note that,this potential difference is referred to as on EL driving voltage.

Then, the switching TFT is turned off, and the digital data signal heldin the capacitor is inputted to the gate electrode of the EL drivingTFT.

In Embodiment 10, in the case where the digital data signal hasinformation of “0”, the EL driving TFT is turned off, so that the pixelelectrode of the EL element is held at the off power source potential.As a consequence, the EL element does not emit light, the element beingincorporated in the pixel to which the digital data signal havinginformation of “0” is applied.

On the contrary, when the EL element has information of “1”, the ELdriving TFT is turned on, and the pixel electrode of the EL elementbecomes on power source potential. As a consequence, the EL elementemits light, the element being incorporated in the pixel to which thedigital data signal having information of “1” is applied.

The period in which all the switching TFTs are turned off is a sustainperiod.

The period in which the EL element is allowed to emit light (the pixelis allowed to be lit) is any of the periods of Ts1 through Tsn. Here, apredetermined pixel is lit in the period of Tsn.

Next, the address period begins again, and the sustain period beginswhen the data signal is inputted to all the pixels. At this time, any ofthe periods Ts1 through Ts(n−1) becomes a sustain period. Here, apredetermined pixel is allowed to be lit in the period of Ts(n−1).

Hereinbelow, a similar operation is repeated with respect to theremaining n−2 sub-frames, so that the sustain periods are subsequentlyset to Ts(n−2), Ts(n−3) . . . Ts1 and a predetermined pixel is lit inrespective sub-frames.

When n sub-frame periods appear, it can be considered that one frameperiod is completed. At this time, the gray scale level of the pixel canbe determined by summing the sustain period in which the pixel is lit,in other words, the length of the sustain period immediately after theaddress period in which the digital data signal having information of“1” is applied to the pixel. For example, in case of n=8, when theluminance is set to 100% in the case where the pixel emits light in allthe sustain periods, the luminance of 75% can be represented in the casewhere the pixel emits light in Ts1 and Ts2. In the case where Ts3, Ts5and Ts8 are selected, the luminance of 16% can be represented.

When one frame period is completed, the height of the on power sourcepotential is changed so that the polarity of the on EL driving voltagebecomes opposite which voltage is a difference between the stationarypotential and the on power source potential during the next frameperiod. Then, the above operation is conducted which is the same as theprevious frame period. However, the on EL driving voltage in this frameperiod has a polarity opposite to the polarity of the on EL drivingvoltage in the previous frame period, therefore all the EL elements donot emit light. In this specification, the frame period in which the ELelement displays an image is referred to as a display frame period.Besides, on the contrary, the frame period in which no EL elements emitlight and display images is referred to as non-display frame periods.

When the non-display frame period is completed, next another displayframe period begins. The on EL driving voltage changes to a voltagehaving a polarity opposite to the on EL driving voltage in thenon-display frame period.

The image is displayed by alternately repeating the display frame periodand the non-display frame period. The present invention has the abovestructure with the result that the EL driving voltage having an oppositepolarity is applied for each definite period to the EL layerincorporated in the EL element. Consequently, the deterioration of thevoltage-current characteristic of the EL element is improved so that thelife of the EL element can be prolonged as compared to the conventionaldriving method.

Furthermore, as has been described above, in the driving with thealternate current, in the case where the image is displayed for each ofthe frame periods, flickering is generated as a flicker to the eyes ofobservers.

Consequently, according to the present invention, the EL display isdriven with alternate current at a frequency two or more times higherthan the frequency at which no flicker is generated to the eyes ofobservers in the driving with the direct current. In other words, 120 ormore frame periods are provided in one second, so that 60 or more imagesare displayed in one second. With the above structure, flickering in thedriving with the alternate current is prevented.

The structure shown in Embodiment 10 can be put into practice in a freecombination with Embodiments 2 through 9.

Embodiment 11

In the case where a time division gray scale display is provided in adigital style driving with the alternate current, the polarity of the onEL driving voltage changes to the opposite for each sub-frame period. InEmbodiment 11, an example different from Embodiment 1 will be explained.Here, the case of 2_(n) gray scale full color time division gray scaledisplay in the n-bit digital driving method will be explained. Since thetiming chart is the same as the case shown in Embodiment 1, FIG. 5 willbe referred to.

The structure of the pixel portion of the EL display in Embodiment 11 isthe same as the structure shown in FIG. 2B. The gate signal lines (G1through Gn) are connected to the gate electrode of the switching TFTincorporated in each pixel. One of the drain region and the sourceregion of the switching TFT incorporated in each pixel is connected tothe source signal lines (S1 through Sn) while the other is connected tothe gate electrode of the EL driving TFT and the capacitor. Besides, oneof the source region and the drain region of the EL driving TFT isconnected to the power source supply lines (V1 through Vn) while theother is connected to the EL element incorporated in each pixel. Thepower supply lines (V1 through Vn) are also connected to the capacitorincorporated in each pixel.

FIG. 5 shows a timing chart of a driving method according to Embodiment11. In the beginning, one frame period is divided into n sub-frameperiods (SF1 through SFn). Note that, the period in which all the pixelsin the pixel portion display one image is referred to as one frameperiod.

One sub-frame period is divided into an address period (Ta) and asustain period (Ts). The address period refers to time required forinputting data into all the pixels, and the sustain period (alsoreferred to as lighting period) refers to a period in which EL elementemits light in one sub-frame period.

The length of the address periods (Ta1 through Tan) incorporated in nsub-frame periods (SF1 through SFn) respectively are all the same. Thesustain periods (Ts) incorporated in the sub-frame periods SF1 throughSFn respectively are set to Ts1 through Tsn respectively.

The lengths of the sustain periods are set to be Ts1: Ts2: Ts3: . . . :Ts(n−1): Tsn=2⁰: 2⁻⁻¹: 2⁻²: . . . : 2^(−(n-2)): 2^(−(n-1)).

However, the order in which SF1 through SFn are allowed to appear may beany. With the combination of this sustain period, a desired gray scaledisplay can be provided out of 2^(n) gray scale levels.

In the beginning, the power source supply lines (V1 through Vn) can beheld at the off power source potential. Then, the gate signal is inputto the gate signal line G1, so that all the switching TFTs having thegate electrode connected to the gate signal line G1 are turned on.

Then, in the state in which the switching TFTs having the gate electrodeconnected to the gate signal line G1 are turned on, the digital datasignal is inputted to the source signal lines (S1 through Sn) in order.Then, the digital data signals input to the source signal lines (S1through Sn) are inputted to the gate electrode of the EL driving TFT viathe switching TFT in the on state. Furthermore, the digital data signalis input to the capacitor and held.

The above operation is repeated so that the digital data signal isinputted to all the pixels. The period until the digital data signal isinputted to all the pixels is an address period.

At the same time when the address period is completed, the sustainperiod begins. When the sustain period begins, the potential of thepower source supply lines (V1 through Vn) changes from the off powersource potential to the on power source potential. Then, the switchingTFT is turned off, so that the digital data signal held in the capacitoris input to the gate electrode of the EL driving TFT.

In Embodiment 11, the polarity of the on EL driving voltage which is adifference between the on power source potential and the stationarypotential becomes opposite to each other for each sub-frame period whenthe height of the power source potential is changed. Consequently, theEL display repeats the display and the non-display by setting thepolarity of the on EL driving voltage to the opposite for each of thesub-frame periods. The sub-frame period in which the display is providedis referred to as a display sub-frame period while the sub-frame periodin which no display is provided is referred to as non-display sub-frameperiod.

For example, in the first frame period, when the first sub-frame periodis a display period, the second sub-frame period is a non-displayperiod. The third display period again becomes the display period. Thenall the sub-frame periods appear again and the first frame period iscompleted, and the second frame period begins. In the first sub-frameperiod in the second frame period, the EL driving voltage having apolarity opposite to the polarity of the EL driving voltage applied tothe EL element in the first sub-frame period of the first frame periodis applied to the EL layer of the EL element so that the non-displayperiod begins. Then, next the second sub-frame period becomes a displayperiod with the result that the display period and the non-displayperiod come alternately for each of the sub-frame periods.

Note that, in this specification, when the display period and thenon-display period are changed over by setting the polarity of the ELdriving voltage opposite, the period in which display is provided isreferred to as a display period. Furthermore, on the contrary, theperiod in which no display is provided is referred to as a non-displayperiod. Consequently, in this specification, the display frame periodand the display sub-frame period are generally referred to as displayperiods. Besides, on the contrary, the non-display frame period and thenon-display sub-frame period are generally referred to as non-displayperiods.

In Embodiment 11, in the case where the digital data signal hasinformation of “0”, the EL driving TFT is turned off, and the pixelelectrode of the EL element is held at the off power source potential.As a consequence, the EL element does not emit light, the element beingincorporated in the pixel to which the digital data signal havinginformation of “0” is applied.

On the contrary, in the case where the digital data signal hasinformation of “1”, the EL driving TFT is turned on, so that the pixelelectrode of the EL element becomes on power source potential. As aconsequence, the EL element emits light, the element being incorporatedin the pixel to which the digital data signal having information of “1”is applied.

The period in which all the switching TFTs are turned off is the sustainperiod.

The period in which the EL element is allowed to emit light is any ofthe periods Ts1 through Tsn. Here, a predetermined pixel is lit in theperiod of Tsn.

Next, the address period begins again, and then the sustain periodbegins upon the input of the data signal to all the pixels. At thistime, any of the periods Ts1 through Ts(n−1) becomes the sustain period.Here, a predetermined pixel is lit in the period of Ts(n−1).

Hereinafter, the similar operation is repeated with respect to theremaining n−2 sub-frames. Subsequently, the sustain periods are set asTs(n−2), Ts(n−3) . . . Ts1 and a predetermined pixel is lit inrespective sub-frames.

In this manner, in the case where the EL driving voltage having theopposite polarity for each of the sub-frames is applied to the ELelement in the time division gray scale display in the driving with thealternate current, one gray scale display is provided in two frameperiods. In two adjacent frame periods, the gray scale level of thepixel can be determined by summing the sustain period in which the pixelis lit, namely the length of the sustain periods immediately after theaddress period in which the digital data signal having information of“1” is inputted to the pixel. For example, in case of n=8, when theluminance is set to 100% in the case where the pixel emits light in allthe sustain periods, the luminance of 75% can be represented in the casewhere the pixel emits light in Ts1 and Ts2. In the case where Ts3, Ts5and Ts8 are selected, the luminance of 16% can be represented.

The present invention has the structure described above, so that the ELdriving voltage having the opposite polarity for each of the sub-frameperiods is applied to the EL layer incorporated in the EL element.Consequently, the deterioration of the current-voltage characteristic ofthe EL element is improved with the result that the life of the ELelement can be prolonged as compared with the conventional drivingmethod.

In Embodiment 11, there is obtained an effect in that a flicker occurswith difficulty as compared with the digital style EL display which isdriven with the alternate current for each of the frame periods shown inthe embodiment.

The structure shown in Embodiment 11 can be put into practice in a freecombination with Embodiments 2 through 9.

Embodiment 12

The EL display device (EL module) formed by performing the presentinvention is superior to a liquid crystal display device in visibilityin bright places because of its self-luminous properties. Therefore, thepresent invention can be used as a display portion of a direct-view typeEL display (indicating a display equipped with an EL module). As the ELdisplay, there are a personal computer monitor, a TV receiving monitor,an advertisement display monitor, and so on.

The present invention can be operated to all electronic equipment thatincludes displays as constituent parts, including the aforementioned ELdisplay.

As the electronic equipment, there are an EL display, video camera,digital camera, head mounted type display, car-navigator, personalcomputer, portable information terminal (mobile computer, mobile phone,electronic book, etc.), and picture reproducer provided with recordingmedia (specifically, device which can reproduce a recording medium andequip a display capable of displaying the image such as compact disk(CD), laser disc (LD), or digital video disc (DVD)). Examples of theelectronic equipment are shown in FIGS. 14A to 14E.

FIG. 14A depicts a personal computer, which includes a main body 2001,case 2002, EL display portion 2003, and keyboard 2004. The EL display2003 of the present invention can be used for the display portion ofpersonal computer.

FIG. 14B depicts a video camera, which includes a main body 2101, ELdisplay device 2102, voice inputting portion 2103, operation switch2104, battery 2105, and image reception portion 2106. The presentinvention can be used as the display device 2102.

FIG. 14C depicts a part of a head mounted type EL display (right side);which includes a main body 2301, signal cable 2302, head fixation band2303, display monitor 2304, optical system 2305, and EL display 2306.The EL display 2306 of the present invention can be used as a displaypotion of EL display device.

FIG. 14D depicts a picture reproducer (specifically, DVD reproducingplayer) provided with recording media, which includes a main body 2401,recording medium 2402 (CD, LD, DVD, etc.), operation switch 2403, ELdisplay device (a) 2404, and EL display panel (b) 2405. The EL displaydevice (a) chiefly displays image information, and the EL display device(b) chiefly displays character information. The EL display device (a)and (b) of the present invention can be used as a display portion ofprovided with a picture reproducer provided with recording media. Thepresent invention is applicable to a CD player or a game machine as apicture reproducer provided with recording media.

FIG. 14E depicts a portable (mobile) computer, which includes a mainbody 2501, camera 2502, image reception part 2503, operation switch2504, and EL display 2505. The EL display 2505 of the present inventioncan be used as a display portion of the mobile computer.

If the luminescence brightness of the EL material is enhanced in thefuture, the present invention will be applicable to a front or rear typeprojector.

The present invention has a quite wide scope of application, asmentioned above, and is applicable to electronic equipment in allfields. The electronic equipment of this embodiment can be realized bythe using any structure resulting from the free combination ofembodiments 1 to 11.

The structure described above allows the EL driving voltage having anopposite polarity to be applied to the EL element for each of thedefinite periods. Accordingly, the deterioration of the current-voltagecharacteristic of the EL element is improved, and the life of the ELelement may be prolonged as compared with the conventional drivingmethod.

Furthermore, as described above, in the case where the image isdisplayed for each one of the frame periods in the driving with thealternate current, flickering is generated as a flicker to the eyes ofobservers.

Consequently, in the present invention, it is preferable that the ELdisplay is driven with the alternate current at a frequency two times ormore than the frequency at which no flicker is generated to the eyes ofobservers in the driving with the direct current. In other words, it ispreferable that images are displayed at a frequency of 120 Hz or more.With the above structure, a flicker resulting from the driving with thealternate current can be prevented.

What is claimed is:
 1. (canceled)
 2. A display device comprising: adisplay portion over a substrate, the display portion comprising; afirst pixel; a second pixel adjoining the first pixel; a first lineshared by the first pixel and the second pixel; and a second lineperpendicular to the first line, wherein each of the first pixel and thesecond pixel comprises: a first transistor electrically connected to thefirst line; an interlayer insulating film over the first transistor; anelectroluminescent element over the interlayer insulating film, theelectroluminescent element comprising a pixel electrode electricallyconnected to the first transistor, and a first insulating film over theinterlayer insulating film, and wherein an edge portion of the firstinsulating film covers an edge portion of the pixel electrode and has atapered shape.
 3. The display device according to claim 2, wherein thefirst line is configured to supply current to the electroluminescentelement of the first pixel through the first transistor of the firstpixel and to the electroluminescent element of the second pixel throughthe first transistor of the second pixel.
 4. The display deviceaccording to claim 2, wherein the first line is interposed between thefirst pixel and the second pixel.
 5. The display device according toclaim 2, wherein: each of the first pixel and the second pixel furthercomprises a second transistor electrically connected to the second line;and the second transistor is electrically connected to a gate of thefirst transistor in each of the first pixel and the second pixel.
 6. Thedisplay device according to claim 2, wherein the first line comprises aportion which extends in a direction parallel to the second line.
 7. Thedisplay device according to claim 2, wherein: each of the first pixeland the second pixel further comprises a second insulating film over theelectroluminescent element; and the second insulating film comprisessilicon and nitrogen.
 8. The display device according to claim 2,wherein the pixel electrode is an anode in each of the first pixel andthe second pixel.
 9. A module comprising: the display device accordingto claim 2; and a connector electrically connected to the display deviceand configured to input an electrical signal to the display device. 10.A television receiving monitor comprising the module according to claim9.
 11. A display device comprising: a display portion over a substrate,the display portion comprising; a first pixel; a second pixel adjoiningthe first pixel; a first line shared by the first pixel and the secondpixel; and a second line perpendicular to the first line, wherein eachof the first pixel and the second pixel comprises: a first transistorcomprising: a gate electrode; a semiconductor film over the gateelectrode; a first terminal over the semiconductor film and electricallyconnected to the first line; and a second terminal over thesemiconductor film; a pixel electrode electrically connected to thesecond terminal; an electroluminescent layer over the pixel electrode; asecond electrode over the electroluminescent layer; and a firstinsulating film overlapping with the pixel electrode, and wherein anedge portion of the first insulating film covers an edge portion of thepixel electrode and has a tapered shape.
 12. The display deviceaccording to claim 11, wherein: the first transistor of each of thefirst pixel and the second pixel further comprises a mask over and incontact with the semiconductor film; and a channel formation region ofthe first transistor is located under the mask in each of the firstpixel and the second pixel.
 13. The display device according to claim11, wherein the first line is configured to supply current to the pixelelectrode of the first pixel through the first transistor of the firstpixel and to the pixel electrode of the second pixel through the firsttransistor of the second pixel.
 14. The display device according toclaim 11, wherein the first line is interposed between the first pixeland the second pixel.
 15. The display device according to claim 11,wherein each of the first pixel and the second pixel further comprises asecond transistor electrically connected to the second line, and whereinthe second transistor is electrically connected to the gate electrode ofthe first transistor in each of the first pixel and the second pixel.16. The display device according to claim 11, wherein the first linecomprises a portion which extends in a direction parallel to the secondline.
 17. The display device according to claim 11, wherein: each of thefirst pixel and the second pixel further comprises a second insulatingfilm over the second electrode; and the second insulating film comprisessilicon and nitrogen.
 18. The display device according to claim 11,wherein the pixel electrode is an anode in each of the first pixel andthe second pixel.
 19. A module comprising: the display device accordingto claim 11; and a connector electrically connected to the displaydevice and configured to input an electrical signal to the displaydevice.
 20. A television receiving monitor comprising the moduleaccording to claim
 19. 21. A display device comprising: a displayportion over a substrate, the display portion comprising; a first pixel;a second pixel adjoining the first pixel; a first line shared by thefirst pixel and the second pixel; and a second line perpendicular to thefirst line, wherein each of the first pixel and the second pixelcomprises: a first transistor and a second transistor each comprising: agate electrode; and a semiconductor film over the gate electrode, thesemiconductor film including a channel formation region; anelectroluminescent element comprising a pixel electrode and electricallyconnected to the first transistor; and a first insulating filmoverlapping with the pixel electrode, wherein the second transistor iselectrically connected to the second line and a gate of the firsttransistor, wherein an edge portion of the first insulating film coversan edge portion of the pixel electrode and has a tapered shape, andwherein, in each of the first pixel and the second pixel, a width of thechannel formation region of the first transistor is larger than a widthof the channel formation region of the second transistor.
 22. Thedisplay device according to claim 21, wherein: the first transistor andthe second transistor of each of the first pixel and the second pixeleach comprise a mask over and in contact with the semiconductor film;and the channel formation region is located under the mask in each ofthe first and second transistors of the first pixel and the secondpixel.
 23. The display device according to claim 21, wherein the firstline is configured to supply current to the pixel electrode of the firstpixel through the first transistor of the first pixel and to the pixelelectrode of the second pixel through the first transistor of the secondpixel.
 24. The display device according to claim 21, wherein the firstline is interposed between the first pixel and the second pixel.
 25. Thedisplay device according to claim 21, wherein the first line comprises aportion which extends in a direction parallel to the second line. 26.The display device according to claim 21, wherein: each of the firstpixel and the second pixel further comprises a second insulating filmover the electroluminescent element; and the second insulating filmcomprises silicon and nitrogen.
 27. The display device according toclaim 21, wherein the pixel electrode is an anode in each of the firstpixel and the second pixel.
 28. A module comprising: the display deviceaccording to claim 21; and a connector electrically connected to thedisplay device and configured to input an electrical signal to thedisplay device.
 29. A television receiving monitor comprising the moduleaccording to claim 28.